ITMI932681A1 - Dispositivo a circuito integrato e metodo per produrre lo stesso - Google Patents

Dispositivo a circuito integrato e metodo per produrre lo stesso

Info

Publication number
ITMI932681A1
ITMI932681A1 IT002681A ITMI932681A ITMI932681A1 IT MI932681 A1 ITMI932681 A1 IT MI932681A1 IT 002681 A IT002681 A IT 002681A IT MI932681 A ITMI932681 A IT MI932681A IT MI932681 A1 ITMI932681 A1 IT MI932681A1
Authority
IT
Italy
Prior art keywords
produce
same
integrated circuit
circuit device
integrated
Prior art date
Application number
IT002681A
Other languages
English (en)
Inventor
Matsunaga Daisuke
Shinpuku Fumihiko
Miyazawa Hisashi
Hashimi Kazuo
Kawaguchi Kazushi
Hashimoto Koichi
Ema Taiji
Ohtsuka Toshiyuki
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of ITMI932681A0 publication Critical patent/ITMI932681A0/it
Publication of ITMI932681A1 publication Critical patent/ITMI932681A1/it
Application granted granted Critical
Publication of IT1276042B1 publication Critical patent/IT1276042B1/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT93MI002681A 1992-12-22 1993-12-21 Dispositivo a circuito integrato e metodo per produrre lo stesso IT1276042B1 (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP34175992 1992-12-22
JP5148119A JPH06244377A (ja) 1992-12-22 1993-06-18 集積回路装置及びその製造方法

Publications (3)

Publication Number Publication Date
ITMI932681A0 ITMI932681A0 (it) 1993-12-21
ITMI932681A1 true ITMI932681A1 (it) 1995-06-21
IT1276042B1 IT1276042B1 (it) 1997-10-24

Family

ID=26478442

Family Applications (1)

Application Number Title Priority Date Filing Date
IT93MI002681A IT1276042B1 (it) 1992-12-22 1993-12-21 Dispositivo a circuito integrato e metodo per produrre lo stesso

Country Status (3)

Country Link
JP (1) JPH06244377A (it)
KR (1) KR940016838A (it)
IT (1) IT1276042B1 (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100295656B1 (ko) * 1997-09-12 2001-08-07 김영환 반도체메모리제조방법
JP4650153B2 (ja) * 2005-08-05 2011-03-16 セイコーエプソン株式会社 電気光学装置、電子機器及び電気光学装置の製造方法

Also Published As

Publication number Publication date
IT1276042B1 (it) 1997-10-24
KR940016838A (ko) 1994-07-25
ITMI932681A0 (it) 1993-12-21
JPH06244377A (ja) 1994-09-02

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961220