IT8648650A0 - Preforma di saldatura e metodi per utilizzarla - Google Patents

Preforma di saldatura e metodi per utilizzarla

Info

Publication number
IT8648650A0
IT8648650A0 IT8648650A IT4865086A IT8648650A0 IT 8648650 A0 IT8648650 A0 IT 8648650A0 IT 8648650 A IT8648650 A IT 8648650A IT 4865086 A IT4865086 A IT 4865086A IT 8648650 A0 IT8648650 A0 IT 8648650A0
Authority
IT
Italy
Prior art keywords
methods
welding preform
preform
welding
Prior art date
Application number
IT8648650A
Other languages
English (en)
Other versions
IT1198474B (it
Inventor
Norbert J Socolowski
Original Assignee
Fry Metals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fry Metals Inc filed Critical Fry Metals Inc
Publication of IT8648650A0 publication Critical patent/IT8648650A0/it
Application granted granted Critical
Publication of IT1198474B publication Critical patent/IT1198474B/it

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2924/014—Solder alloys
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3478—Applying solder preforms; Transferring prefabricated solder patterns

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
IT48650/86A 1985-11-27 1986-11-13 Preforma di saldatura e metodi per utilizzarla IT1198474B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/802,240 US4709849A (en) 1985-11-27 1985-11-27 Solder preform and methods employing the same

Publications (2)

Publication Number Publication Date
IT8648650A0 true IT8648650A0 (it) 1986-11-13
IT1198474B IT1198474B (it) 1988-12-21

Family

ID=25183186

Family Applications (1)

Application Number Title Priority Date Filing Date
IT48650/86A IT1198474B (it) 1985-11-27 1986-11-13 Preforma di saldatura e metodi per utilizzarla

Country Status (5)

Country Link
US (1) US4709849A (it)
JP (1) JPS62128533A (it)
DE (1) DE3640435A1 (it)
GB (1) GB2183521A (it)
IT (1) IT1198474B (it)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3777522D1 (de) * 1986-10-17 1992-04-23 Hitachi Ltd Verfahren zum herstellen einer gemischten struktur fuer halbleiteranordnung.
US4803124A (en) * 1987-01-12 1989-02-07 Alphasem Corporation Bonding semiconductor chips to a mounting surface utilizing adhesive applied in starfish patterns
US5187123A (en) * 1988-04-30 1993-02-16 Matsushita Electric Industrial Co., Ltd. Method for bonding a semiconductor device to a lead frame die pad using plural adhesive spots
US5330801A (en) * 1990-03-16 1994-07-19 United Technologies Corporation Process for tinning electrically conductive wire
US5121871A (en) * 1990-04-20 1992-06-16 The United States Of America As Represented By The United States Department Of Energy Solder extrusion pressure bonding process and bonded products produced thereby
EP0752294B1 (de) * 1995-07-01 2000-06-21 Esec Sa Verfahren und Einrichtung zum Austragen von flüssigem Lot
US6347901B1 (en) * 1999-11-01 2002-02-19 International Business Machines Corporation Solder interconnect techniques
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Also Published As

Publication number Publication date
IT1198474B (it) 1988-12-21
JPS62128533A (ja) 1987-06-10
DE3640435A1 (de) 1987-06-11
GB8626254D0 (en) 1986-12-03
US4709849A (en) 1987-12-01
GB2183521A (en) 1987-06-10

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