IT8622731A0 - Dispositivo elettronico integrato, in particolre dispositivo cmos, eprocedimento per la sua fabbricazione con segregazione delle impurita' metalliche. - Google Patents
Dispositivo elettronico integrato, in particolre dispositivo cmos, eprocedimento per la sua fabbricazione con segregazione delle impurita' metalliche.Info
- Publication number
- IT8622731A0 IT8622731A0 IT8622731A IT2273186A IT8622731A0 IT 8622731 A0 IT8622731 A0 IT 8622731A0 IT 8622731 A IT8622731 A IT 8622731A IT 2273186 A IT2273186 A IT 2273186A IT 8622731 A0 IT8622731 A0 IT 8622731A0
- Authority
- IT
- Italy
- Prior art keywords
- segregation
- procedure
- manufacture
- integrated electronic
- electronic device
- Prior art date
Links
- 239000012535 impurity Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 238000005204 segregation Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8622731A IT1213563B (it) | 1986-12-17 | 1986-12-17 | Dispositivo elettronico integrato, in particolre dispositivo cmos, eprocedimento per la sua fabbricazione con segregazione delle impurita' metalliche. |
DE87117453T DE3786763T2 (de) | 1986-12-17 | 1987-11-26 | Verfahren zur Herstellung einer integrierten elektronischen Schaltung, ins besondere eines CMOS-Bauelementes, das die Absonderung metallischer Verunreinigungen umfasst. |
EP87117453A EP0271749B1 (en) | 1986-12-17 | 1987-11-26 | Process for the manufacture of an integrated electronic device, in particular a cmos device, with segregation of metallic impurities |
JP62320040A JPS63164325A (ja) | 1986-12-17 | 1987-12-16 | 集積電子装置および金属不純物を分離する方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8622731A IT1213563B (it) | 1986-12-17 | 1986-12-17 | Dispositivo elettronico integrato, in particolre dispositivo cmos, eprocedimento per la sua fabbricazione con segregazione delle impurita' metalliche. |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8622731A0 true IT8622731A0 (it) | 1986-12-17 |
IT1213563B IT1213563B (it) | 1989-12-20 |
Family
ID=11199775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8622731A IT1213563B (it) | 1986-12-17 | 1986-12-17 | Dispositivo elettronico integrato, in particolre dispositivo cmos, eprocedimento per la sua fabbricazione con segregazione delle impurita' metalliche. |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0271749B1 (it) |
JP (1) | JPS63164325A (it) |
DE (1) | DE3786763T2 (it) |
IT (1) | IT1213563B (it) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58138034A (ja) * | 1982-02-12 | 1983-08-16 | Nec Corp | 半導体装置の製造方法 |
-
1986
- 1986-12-17 IT IT8622731A patent/IT1213563B/it active
-
1987
- 1987-11-26 DE DE87117453T patent/DE3786763T2/de not_active Expired - Fee Related
- 1987-11-26 EP EP87117453A patent/EP0271749B1/en not_active Expired - Lifetime
- 1987-12-16 JP JP62320040A patent/JPS63164325A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0271749A3 (en) | 1989-01-11 |
DE3786763D1 (de) | 1993-09-02 |
DE3786763T2 (de) | 1993-10-28 |
JPS63164325A (ja) | 1988-07-07 |
EP0271749A2 (en) | 1988-06-22 |
EP0271749B1 (en) | 1993-07-28 |
IT1213563B (it) | 1989-12-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19961227 |