IT8247842A0 - Perfezionamento nelle cellule di memoria con capacita' di memorizzazione di piu' di due livelli di tensione - Google Patents

Perfezionamento nelle cellule di memoria con capacita' di memorizzazione di piu' di due livelli di tensione

Info

Publication number
IT8247842A0
IT8247842A0 IT8247842A IT4784282A IT8247842A0 IT 8247842 A0 IT8247842 A0 IT 8247842A0 IT 8247842 A IT8247842 A IT 8247842A IT 4784282 A IT4784282 A IT 4784282A IT 8247842 A0 IT8247842 A0 IT 8247842A0
Authority
IT
Italy
Prior art keywords
ability
store
improvement
memory cells
voltage levels
Prior art date
Application number
IT8247842A
Other languages
English (en)
Other versions
IT1186670B (it
Inventor
Richard Henry Adlhoch
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of IT8247842A0 publication Critical patent/IT8247842A0/it
Application granted granted Critical
Publication of IT1186670B publication Critical patent/IT1186670B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5692Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
IT47842/82A 1981-02-25 1982-02-22 Perfezionamento nelle cellule di memoria con capacita' di memorizzazione di piu' di due livelli di tensione IT1186670B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23818381A 1981-02-25 1981-02-25

Publications (2)

Publication Number Publication Date
IT8247842A0 true IT8247842A0 (it) 1982-02-22
IT1186670B IT1186670B (it) 1987-12-04

Family

ID=22896827

Family Applications (1)

Application Number Title Priority Date Filing Date
IT47842/82A IT1186670B (it) 1981-02-25 1982-02-22 Perfezionamento nelle cellule di memoria con capacita' di memorizzazione di piu' di due livelli di tensione

Country Status (3)

Country Link
EP (1) EP0072846A1 (it)
IT (1) IT1186670B (it)
WO (1) WO1982002977A1 (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5122688A (en) * 1988-07-29 1992-06-16 International Business Machines Corporation Trinary check trit generator, latch, comparator and multiplexer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151603A (en) * 1977-10-31 1979-04-24 International Business Machines Corporation Precharged FET ROS array
JPS54161853A (en) * 1978-06-12 1979-12-21 Seiko Epson Corp Read-only memory
US4192014A (en) * 1978-11-20 1980-03-04 Ncr Corporation ROM memory cell with 2n FET channel widths
US4272830A (en) * 1978-12-22 1981-06-09 Motorola, Inc. ROM Storage location having more than two states
US4287571A (en) * 1979-09-11 1981-09-01 International Business Machines Corporation High density transistor arrays

Also Published As

Publication number Publication date
EP0072846A1 (en) 1983-03-02
IT1186670B (it) 1987-12-04
WO1982002977A1 (en) 1982-09-02

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