IT8125597A0 - Apparato di verifica della immunita' ai disturbi dinamici di circuiti integrati digitali. - Google Patents

Apparato di verifica della immunita' ai disturbi dinamici di circuiti integrati digitali.

Info

Publication number
IT8125597A0
IT8125597A0 IT8125597A IT2559781A IT8125597A0 IT 8125597 A0 IT8125597 A0 IT 8125597A0 IT 8125597 A IT8125597 A IT 8125597A IT 2559781 A IT2559781 A IT 2559781A IT 8125597 A0 IT8125597 A0 IT 8125597A0
Authority
IT
Italy
Prior art keywords
immunity
testing
integrated circuits
digital integrated
dynamic disturbances
Prior art date
Application number
IT8125597A
Other languages
English (en)
Other versions
IT1140156B (it
Inventor
Rossano Pasquinelli
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Priority to IT25597/81A priority Critical patent/IT1140156B/it
Publication of IT8125597A0 publication Critical patent/IT8125597A0/it
Priority to US06/422,622 priority patent/US4481628A/en
Priority to DE8282111507T priority patent/DE3263570D1/de
Priority to EP82111507A priority patent/EP0084644B1/en
Application granted granted Critical
Publication of IT1140156B publication Critical patent/IT1140156B/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/001—Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing
    • G01R31/002—Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing where the device under test is an electronic circuit
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/26—Measuring noise figure; Measuring signal-to-noise ratio

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Tests Of Electronic Circuits (AREA)
IT25597/81A 1981-12-15 1981-12-15 Apparato di verifica della immunita' ai disturbi dinamici di circuiti integrati digitali IT1140156B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT25597/81A IT1140156B (it) 1981-12-15 1981-12-15 Apparato di verifica della immunita' ai disturbi dinamici di circuiti integrati digitali
US06/422,622 US4481628A (en) 1981-12-15 1982-09-24 Apparatus for testing dynamic noise immunity of digital integrated circuits
DE8282111507T DE3263570D1 (en) 1981-12-15 1982-12-11 Apparatus for testing dynamical noise immunity of digital integrated circuits
EP82111507A EP0084644B1 (en) 1981-12-15 1982-12-11 Apparatus for testing dynamical noise immunity of digital integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT25597/81A IT1140156B (it) 1981-12-15 1981-12-15 Apparato di verifica della immunita' ai disturbi dinamici di circuiti integrati digitali

Publications (2)

Publication Number Publication Date
IT8125597A0 true IT8125597A0 (it) 1981-12-15
IT1140156B IT1140156B (it) 1986-09-24

Family

ID=11217215

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25597/81A IT1140156B (it) 1981-12-15 1981-12-15 Apparato di verifica della immunita' ai disturbi dinamici di circuiti integrati digitali

Country Status (4)

Country Link
US (1) US4481628A (it)
EP (1) EP0084644B1 (it)
DE (1) DE3263570D1 (it)
IT (1) IT1140156B (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4594677A (en) * 1983-11-09 1986-06-10 International Business Machines Corporation System for detecting and diagnosing noise caused by simultaneous current switching
US4680762A (en) * 1985-10-17 1987-07-14 Inmos Corporation Method and apparatus for locating soft cells in a ram
US4835459A (en) * 1986-05-16 1989-05-30 Hughes Aircraft Company Automatic fault insertion system (AFIS)
US4965800A (en) * 1988-10-11 1990-10-23 Farnbach William A Digital signal fault detector
JPH03283742A (ja) * 1990-03-30 1991-12-13 Omron Corp 波形整形方法および装置ならびに波形整形のためのしきい値の作成方法および装置
KR930008680B1 (ko) * 1991-05-15 1993-09-11 김덕우 이상검출표시 회로가 내장된 반도체 소자
JP2758817B2 (ja) * 1993-12-13 1998-05-28 日本電気株式会社 論理回路実現性判定システム
US6005406A (en) * 1995-12-07 1999-12-21 International Business Machines Corporation Test device and method facilitating aggressive circuit design
DE19727516B4 (de) * 1997-06-30 2006-05-04 T-Mobile Deutschland Gmbh Verfahren zur Bestimmung des internen Rauschens digitaler Schaltkreise
US7031889B1 (en) * 1999-03-22 2006-04-18 Hewlett-Packard Development Company, L.P. Method and apparatus for evaluating the design quality of network nodes
US7233889B2 (en) * 2001-10-25 2007-06-19 Matsushita Electric Industrial Co., Ltd. Method, apparatus, and computer program for evaluating noise immunity of a semiconductor device
US6792374B2 (en) * 2001-10-30 2004-09-14 Micron Technology, Inc. Apparatus and method for determining effect of on-chip noise on signal propagation
CN117352034A (zh) * 2022-06-29 2024-01-05 长鑫存储技术有限公司 数据输入校验方法及数据输入校验结构

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3548176A (en) * 1968-01-18 1970-12-15 Ibm Probable future error detector
US3541441A (en) * 1969-02-17 1970-11-17 Ibm Test system for evaluating amplitude and response characteristics of logic circuits
US3573445A (en) * 1969-07-07 1971-04-06 Ludmila Alexandrovna Korytnaja Device for programmed check of digital computers
DE2052647A1 (de) * 1970-10-27 1972-05-04 Licentia Gmbh Großsignaltestverfahren, insbesondere für FM-Empfänger
US3916306A (en) * 1973-09-06 1975-10-28 Ibm Method and apparatus for testing high circuit density devices
US4125764A (en) * 1977-08-01 1978-11-14 E-Systems, Inc. Transversal correlator error detector

Also Published As

Publication number Publication date
EP0084644B1 (en) 1985-05-15
DE3263570D1 (en) 1985-06-20
US4481628A (en) 1984-11-06
EP0084644A1 (en) 1983-08-03
IT1140156B (it) 1986-09-24

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