IT7925852A0 - Cella di memoria tagliata mediante laser. - Google Patents
Cella di memoria tagliata mediante laser.Info
- Publication number
- IT7925852A0 IT7925852A0 IT7925852A IT2585279A IT7925852A0 IT 7925852 A0 IT7925852 A0 IT 7925852A0 IT 7925852 A IT7925852 A IT 7925852A IT 2585279 A IT2585279 A IT 2585279A IT 7925852 A0 IT7925852 A0 IT 7925852A0
- Authority
- IT
- Italy
- Prior art keywords
- laser
- memory cell
- cell cut
- cut
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/954,947 US4198696A (en) | 1978-10-24 | 1978-10-24 | Laser cut storage cell |
Publications (2)
Publication Number | Publication Date |
---|---|
IT7925852A0 true IT7925852A0 (it) | 1979-09-20 |
IT1165312B IT1165312B (it) | 1987-04-22 |
Family
ID=25496150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT25852/79A IT1165312B (it) | 1978-10-24 | 1979-09-20 | Cella di memoria tagliata mediante laser |
Country Status (5)
Country | Link |
---|---|
US (1) | US4198696A (it) |
EP (1) | EP0010139B1 (it) |
JP (1) | JPS586240B2 (it) |
DE (1) | DE2965440D1 (it) |
IT (1) | IT1165312B (it) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS584969A (ja) * | 1981-06-30 | 1983-01-12 | Fujitsu Ltd | 半導体装置 |
JP2793232B2 (ja) * | 1989-03-17 | 1998-09-03 | 株式会社東芝 | イオンビームによる配線の切断および接続に適した半導体装置 |
FR2697673B1 (fr) * | 1992-10-29 | 1994-12-16 | Gemplus Card Int | Circuit à fusible, pour circuit intégré. |
US5807791A (en) * | 1995-02-22 | 1998-09-15 | International Business Machines Corporation | Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
US5703747A (en) * | 1995-02-22 | 1997-12-30 | Voldman; Steven Howard | Multichip semiconductor structures with interchip electrostatic discharge protection, and fabrication methods therefore |
US6433403B1 (en) * | 1999-04-21 | 2002-08-13 | Micron Technology, Inc. | Integrated circuit having temporary conductive path structure and method for forming the same |
US7316934B2 (en) * | 2000-12-18 | 2008-01-08 | Zavitan Semiconductors, Inc. | Personalized hardware |
US9202554B2 (en) | 2014-03-13 | 2015-12-01 | International Business Machines Corporation | Methods and circuits for generating physically unclonable function |
US10749019B2 (en) * | 2018-07-03 | 2020-08-18 | Semiconductor Components Industries, Llc | Circuit and electronic device including an enhancement-mode transistor |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1499444A (fr) * | 1966-09-16 | 1967-10-27 | Constr Telephoniques | Matrice de circuits logiques intégrés |
GB1209271A (en) * | 1967-02-27 | 1970-10-21 | Hitachi Ltd | Improvements in semiconductor devices |
US3584183A (en) * | 1968-10-03 | 1971-06-08 | North American Rockwell | Laser encoding of diode arrays |
US3740523A (en) * | 1971-12-30 | 1973-06-19 | Bell Telephone Labor Inc | Encoding of read only memory by laser vaporization |
US3777216A (en) * | 1972-10-02 | 1973-12-04 | Motorola Inc | Avalanche injection input protection circuit |
JPS5041479A (it) * | 1973-08-18 | 1975-04-15 | ||
US3914855A (en) * | 1974-05-09 | 1975-10-28 | Bell Telephone Labor Inc | Methods for making MOS read-only memories |
US3967295A (en) * | 1975-04-03 | 1976-06-29 | Rca Corporation | Input transient protection for integrated circuit element |
-
1978
- 1978-10-24 US US05/954,947 patent/US4198696A/en not_active Expired - Lifetime
-
1979
- 1979-08-17 JP JP54104168A patent/JPS586240B2/ja not_active Expired
- 1979-08-23 DE DE7979103106T patent/DE2965440D1/de not_active Expired
- 1979-08-23 EP EP79103106A patent/EP0010139B1/de not_active Expired
- 1979-09-20 IT IT25852/79A patent/IT1165312B/it active
Also Published As
Publication number | Publication date |
---|---|
EP0010139A1 (de) | 1980-04-30 |
JPS5558895A (en) | 1980-05-01 |
JPS586240B2 (ja) | 1983-02-03 |
EP0010139B1 (de) | 1983-05-18 |
DE2965440D1 (en) | 1983-07-07 |
IT1165312B (it) | 1987-04-22 |
US4198696A (en) | 1980-04-15 |
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