IT201600088225A1 - Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria - Google Patents

Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria

Info

Publication number
IT201600088225A1
IT201600088225A1 IT102016000088225A IT201600088225A IT201600088225A1 IT 201600088225 A1 IT201600088225 A1 IT 201600088225A1 IT 102016000088225 A IT102016000088225 A IT 102016000088225A IT 201600088225 A IT201600088225 A IT 201600088225A IT 201600088225 A1 IT201600088225 A1 IT 201600088225A1
Authority
IT
Italy
Prior art keywords
memory device
travel circuit
level travel
relative
relative memory
Prior art date
Application number
IT102016000088225A
Other languages
English (en)
Inventor
Antonino Conte
Carmelo Paolino
Maurizio Francesco Perroni
Salvatore Polizzi
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT102016000088225A priority Critical patent/IT201600088225A1/it
Priority to US15/476,003 priority patent/US9972394B2/en
Publication of IT201600088225A1 publication Critical patent/IT201600088225A1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/20—Initialising; Data preset; Chip identification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
IT102016000088225A 2016-08-30 2016-08-30 Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria IT201600088225A1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT102016000088225A IT201600088225A1 (it) 2016-08-30 2016-08-30 Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria
US15/476,003 US9972394B2 (en) 2016-08-30 2017-03-31 Level shifter circuit and associated memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT102016000088225A IT201600088225A1 (it) 2016-08-30 2016-08-30 Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria

Publications (1)

Publication Number Publication Date
IT201600088225A1 true IT201600088225A1 (it) 2018-03-02

Family

ID=58159298

Family Applications (1)

Application Number Title Priority Date Filing Date
IT102016000088225A IT201600088225A1 (it) 2016-08-30 2016-08-30 Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria

Country Status (2)

Country Link
US (1) US9972394B2 (it)
IT (1) IT201600088225A1 (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9214933B2 (en) 2014-02-25 2015-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Input/output circuit
ITUA20161478A1 (it) * 2016-03-09 2017-09-09 St Microelectronics Srl Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile
US10447290B2 (en) 2017-12-11 2019-10-15 Texas Instruments Incorporated Reduced noise dynamic comparator for a successive approximation register analog-to-digital converter
IT201800003622A1 (it) * 2018-03-15 2019-09-15 St Microelectronics Srl Circuito traslatore di livello con migliorata efficienza e capacita' di traslazione di livello in due domini, in particolare per l'utilizzo in un dispositivo di memoria
US10855281B2 (en) * 2018-10-04 2020-12-01 Raytheon Company Wide supply range digital level shifter cell
US11303462B2 (en) 2018-11-19 2022-04-12 Arizona Board Of Regents On Behalf Of Northern Arizona University Unequally powered cryptography using physical unclonable functions
CN112073048B (zh) * 2020-09-02 2022-11-04 敦泰电子（深圳）有限公司 电平移位电路

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090302924A1 (en) * 2008-06-04 2009-12-10 Hynix Semiconductor Inc. Level shifter capable of improving current drivability
US20110063012A1 (en) * 2009-09-11 2011-03-17 Kok Lim Chan Circuit arrangement
US20130222036A1 (en) * 2012-02-23 2013-08-29 SK Hynix Inc. Voltage level converting circuit

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08241240A (ja) 1995-03-03 1996-09-17 Toshiba Corp コンピュータシステム
JP3055515B2 (ja) 1997-12-24 2000-06-26 日本電気株式会社 電圧変換バッファ回路
JP3796034B2 (ja) 1997-12-26 2006-07-12 株式会社ルネサステクノロジ レベル変換回路および半導体集積回路装置
US6580411B1 (en) 1998-04-28 2003-06-17 Sharp Kabushiki Kaisha Latch circuit, shift register circuit and image display device operated with a low consumption of power
US6351173B1 (en) 2000-08-25 2002-02-26 Texas Instruments Incorporated Circuit and method for an integrated level shifting latch
KR100500516B1 (ko) 2003-07-14 2005-07-12 삼성전자주식회사 레벨 쉬프터 및 레벨 쉬프팅 방법
JP5100555B2 (ja) * 2008-07-30 2012-12-19 株式会社東芝 半導体記憶装置
JP2013012553A (ja) * 2011-06-28 2013-01-17 Toshiba Corp 半導体記憶装置
US9197200B2 (en) * 2013-05-16 2015-11-24 Dialog Semiconductor Gmbh Dynamic level shifter circuit
US9331516B2 (en) * 2014-05-18 2016-05-03 Freescale Semiconductor, Inc. Single power supply level shifter
KR102340550B1 (ko) * 2015-04-10 2021-12-21 에스케이하이닉스 주식회사 전원 제어장치

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090302924A1 (en) * 2008-06-04 2009-12-10 Hynix Semiconductor Inc. Level shifter capable of improving current drivability
US20110063012A1 (en) * 2009-09-11 2011-03-17 Kok Lim Chan Circuit arrangement
US20130222036A1 (en) * 2012-02-23 2013-08-29 SK Hynix Inc. Voltage level converting circuit

Also Published As

Publication number Publication date
US9972394B2 (en) 2018-05-15
US20180061495A1 (en) 2018-03-01

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