IT1316269B1 - Riduzione di rumore di alimentazione nella selezione di colonna indispositivi di memoria. - Google Patents

Riduzione di rumore di alimentazione nella selezione di colonna indispositivi di memoria.

Info

Publication number
IT1316269B1
IT1316269B1 IT2000RM000698A ITRM20000698A IT1316269B1 IT 1316269 B1 IT1316269 B1 IT 1316269B1 IT 2000RM000698 A IT2000RM000698 A IT 2000RM000698A IT RM20000698 A ITRM20000698 A IT RM20000698A IT 1316269 B1 IT1316269 B1 IT 1316269B1
Authority
IT
Italy
Prior art keywords
selection
reduction
memory devices
power noise
column memory
Prior art date
Application number
IT2000RM000698A
Other languages
English (en)
Inventor
Iorio Ercole Di
Giulio G Marotta
Giovanni Santin
Tomaso Vali
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to IT2000RM000698A priority Critical patent/IT1316269B1/it
Publication of ITRM20000698A0 publication Critical patent/ITRM20000698A0/it
Priority to US10/032,375 priority patent/US6584035B2/en
Publication of ITRM20000698A1 publication Critical patent/ITRM20000698A1/it
Application granted granted Critical
Publication of IT1316269B1 publication Critical patent/IT1316269B1/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048Data bus control circuits, e.g. precharging, presetting, equalising
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/002Isolation gates, i.e. gates coupling bit lines to the sense amplifier
IT2000RM000698A 2000-12-28 2000-12-28 Riduzione di rumore di alimentazione nella selezione di colonna indispositivi di memoria. IT1316269B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT2000RM000698A IT1316269B1 (it) 2000-12-28 2000-12-28 Riduzione di rumore di alimentazione nella selezione di colonna indispositivi di memoria.
US10/032,375 US6584035B2 (en) 2000-12-28 2001-12-21 Supply noise reduction in memory device column selection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2000RM000698A IT1316269B1 (it) 2000-12-28 2000-12-28 Riduzione di rumore di alimentazione nella selezione di colonna indispositivi di memoria.

Publications (3)

Publication Number Publication Date
ITRM20000698A0 ITRM20000698A0 (it) 2000-12-28
ITRM20000698A1 ITRM20000698A1 (it) 2002-06-28
IT1316269B1 true IT1316269B1 (it) 2003-04-03

Family

ID=11455081

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2000RM000698A IT1316269B1 (it) 2000-12-28 2000-12-28 Riduzione di rumore di alimentazione nella selezione di colonna indispositivi di memoria.

Country Status (2)

Country Link
US (1) US6584035B2 (it)
IT (1) IT1316269B1 (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6768677B2 (en) * 2002-11-22 2004-07-27 Advanced Micro Devices, Inc. Cascode amplifier circuit for producing a fast, stable and accurate bit line voltage
US7315466B2 (en) * 2004-08-04 2008-01-01 Samsung Electronics Co., Ltd. Semiconductor memory device and method for arranging and manufacturing the same
US7079434B2 (en) * 2004-09-02 2006-07-18 Micron Technology, Inc. Noise suppression in memory device sensing
KR100645046B1 (ko) * 2004-10-07 2006-11-10 삼성전자주식회사 불 휘발성 메모리 장치의 행 디코더 회로
US7388789B2 (en) * 2005-08-31 2008-06-17 Micron Technology NAND memory device and programming methods
US9395850B2 (en) * 2008-10-06 2016-07-19 Japan Display Inc. Coordinate input device and display device with the same
KR20140064170A (ko) * 2012-11-19 2014-05-28 삼성디스플레이 주식회사 표시장치, 전원제어장치 및 그 구동 방법
CN109243514B (zh) * 2018-08-27 2021-08-06 四川中微芯成科技有限公司 列选电路以及包含该列选电路的eeprom电路

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4763026A (en) 1987-04-09 1988-08-09 National Semiconductor Corporation Sense amplifier for single-ended data sensing
US4975597A (en) * 1987-12-09 1990-12-04 Texas Instruments Incorporated Column select circuit
JP2773465B2 (ja) 1991-06-06 1998-07-09 三菱電機株式会社 ダイナミック型半導体記憶装置
US5638322A (en) 1995-07-19 1997-06-10 Cypress Semiconductor Corp. Apparatus and method for improving common mode noise rejection in pseudo-differential sense amplifiers
US5761112A (en) 1996-09-20 1998-06-02 Mosel Vitelic Corporation Charge storage for sensing operations in a DRAM
JPH10163429A (ja) 1996-11-29 1998-06-19 Mitsubishi Electric Corp 半導体装置
US5835441A (en) * 1997-08-21 1998-11-10 Micron Technology, Inc. Column select latch for SDRAM
US5949728A (en) 1997-12-12 1999-09-07 Scenix Semiconductor, Inc. High speed, noise immune, single ended sensing scheme for non-volatile memories
KR100281798B1 (ko) 1998-10-30 2001-03-02 윤종용 플래시 메모리 장치
KR100308215B1 (ko) 1999-08-12 2001-11-01 윤종용 감지 노이즈를 최소화할 수 있는 랜덤 액세스 메모리 장치

Also Published As

Publication number Publication date
ITRM20000698A1 (it) 2002-06-28
US6584035B2 (en) 2003-06-24
US20020172088A1 (en) 2002-11-21
ITRM20000698A0 (it) 2000-12-28

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