IT1259395B - Metodo di rilevamento di connesioni erronee in schede elettroniche - Google Patents
Metodo di rilevamento di connesioni erronee in schede elettronicheInfo
- Publication number
- IT1259395B IT1259395B ITTO920463A ITTO920463A IT1259395B IT 1259395 B IT1259395 B IT 1259395B IT TO920463 A ITTO920463 A IT TO920463A IT TO920463 A ITTO920463 A IT TO920463A IT 1259395 B IT1259395 B IT 1259395B
- Authority
- IT
- Italy
- Prior art keywords
- currents
- connections
- errone
- detection
- electronic boards
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
- G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
- G01R31/70—Testing of connections between components and printed circuit boards
Abstract
Viene descritto un metodo basato sulla constatazione che i diodi di clamping (4, 8) presenti fra i piedini (2, 3) che presentano caratteristiche funzionali analoghe formano strutture multicollettore che, polarizzate, forniscono correnti di collettore fra loro comparabili nel caso di connessioni corrette. Il metodo comprende quindi le fasi di raggruppare (30) i diodi di clamping (4, 8) in base a criteri di uniformità funzionale o strutturale; polarizzare (32) le strutture multiterminale (10) così ottenute in modo da generare un flusso di correnti (1Ci); misurare (33) tali correnti, confrontare (35, 36) dette correnti misurate; e identificare (36, 37) connessioni erronee in base ad elevate variazioni di tali correnti.(Figure 1 e 5)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITTO920463A IT1259395B (it) | 1992-05-29 | 1992-05-29 | Metodo di rilevamento di connesioni erronee in schede elettroniche |
DE69320535T DE69320535T2 (de) | 1992-05-29 | 1993-05-25 | Verfahren zum Prüfen der Verbindungen elektronischer Karten |
EP93108451A EP0571963B1 (en) | 1992-05-29 | 1993-05-25 | Method of connection testing electronic boards |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITTO920463A IT1259395B (it) | 1992-05-29 | 1992-05-29 | Metodo di rilevamento di connesioni erronee in schede elettroniche |
Publications (3)
Publication Number | Publication Date |
---|---|
ITTO920463A0 ITTO920463A0 (it) | 1992-05-29 |
ITTO920463A1 ITTO920463A1 (it) | 1993-11-29 |
IT1259395B true IT1259395B (it) | 1996-03-13 |
Family
ID=11410503
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITTO920463A IT1259395B (it) | 1992-05-29 | 1992-05-29 | Metodo di rilevamento di connesioni erronee in schede elettroniche |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0571963B1 (it) |
DE (1) | DE69320535T2 (it) |
IT (1) | IT1259395B (it) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5513188A (en) * | 1991-09-10 | 1996-04-30 | Hewlett-Packard Company | Enhanced interconnect testing through utilization of board topology data |
US5521513A (en) * | 1994-10-25 | 1996-05-28 | Teradyne Inc | Manufacturing defect analyzer |
JP3459765B2 (ja) * | 1997-07-16 | 2003-10-27 | シャープ株式会社 | 実装検査システム |
GB2394780B (en) | 2002-10-29 | 2006-06-14 | Ifr Ltd | A method of and apparatus for testing for integrated circuit contact defects |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0306656A1 (de) * | 1987-08-20 | 1989-03-15 | Siemens Aktiengesellschaft | Einrichtung zur Prüfung von IC-Bausteinen |
US5101152A (en) * | 1990-01-31 | 1992-03-31 | Hewlett-Packard Company | Integrated circuit transfer test device system utilizing lateral transistors |
DE4110551C1 (it) * | 1991-03-30 | 1992-07-23 | Ita Ingenieurbuero Fuer Testaufgaben Gmbh, 2000 Hamburg, De |
-
1992
- 1992-05-29 IT ITTO920463A patent/IT1259395B/it active IP Right Grant
-
1993
- 1993-05-25 DE DE69320535T patent/DE69320535T2/de not_active Expired - Fee Related
- 1993-05-25 EP EP93108451A patent/EP0571963B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69320535T2 (de) | 1999-04-22 |
DE69320535D1 (de) | 1998-10-01 |
EP0571963A2 (en) | 1993-12-01 |
EP0571963A3 (it) | 1994-04-13 |
ITTO920463A1 (it) | 1993-11-29 |
EP0571963B1 (en) | 1998-08-26 |
ITTO920463A0 (it) | 1992-05-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970529 |