IT1236602B - Caratterizzazione quantitativa della distorsione geometrica subita da un profilo superficiale di un "wafer". - Google Patents

Caratterizzazione quantitativa della distorsione geometrica subita da un profilo superficiale di un "wafer".

Info

Publication number
IT1236602B
IT1236602B IT08365289A IT8365289A IT1236602B IT 1236602 B IT1236602 B IT 1236602B IT 08365289 A IT08365289 A IT 08365289A IT 8365289 A IT8365289 A IT 8365289A IT 1236602 B IT1236602 B IT 1236602B
Authority
IT
Italy
Prior art keywords
wafer
surface profile
geometric distortion
quantitative characterization
distortion suffered
Prior art date
Application number
IT08365289A
Other languages
English (en)
Other versions
IT8983652A0 (it
IT8983652A1 (it
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT08365289A priority Critical patent/IT1236602B/it
Publication of IT8983652A0 publication Critical patent/IT8983652A0/it
Priority to DE69025880T priority patent/DE69025880T2/de
Priority to EP90830599A priority patent/EP0434643B1/en
Priority to US07/631,018 priority patent/US5152168A/en
Priority to JP2413300A priority patent/JPH04218940A/ja
Publication of IT8983652A1 publication Critical patent/IT8983652A1/it
Application granted granted Critical
Publication of IT1236602B publication Critical patent/IT1236602B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B7/00Measuring arrangements characterised by the use of electric or magnetic techniques
    • G01B7/28Measuring arrangements characterised by the use of electric or magnetic techniques for measuring contours or curvatures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Length Measuring Devices With Unspecified Measuring Means (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
IT08365289A 1989-12-22 1989-12-22 Caratterizzazione quantitativa della distorsione geometrica subita da un profilo superficiale di un "wafer". IT1236602B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT08365289A IT1236602B (it) 1989-12-22 1989-12-22 Caratterizzazione quantitativa della distorsione geometrica subita da un profilo superficiale di un "wafer".
DE69025880T DE69025880T2 (de) 1989-12-22 1990-12-18 Quantitative Beurteilung der geometrischen Abweichung hervorgerufen durch das Profil eines Halbleiterplättchens
EP90830599A EP0434643B1 (en) 1989-12-22 1990-12-18 Quantitative assessment of the geometrical distortion suffered by the profile of a semiconductor wafer
US07/631,018 US5152168A (en) 1989-12-22 1990-12-21 Quantitative assessment of the geometrical distortion suffered by the profile of a semiconductor wafer
JP2413300A JPH04218940A (ja) 1989-12-22 1990-12-22 半導体ウエファのプロフィールにより生ずる幾何的歪みの定量的評価方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT08365289A IT1236602B (it) 1989-12-22 1989-12-22 Caratterizzazione quantitativa della distorsione geometrica subita da un profilo superficiale di un "wafer".

Publications (3)

Publication Number Publication Date
IT8983652A0 IT8983652A0 (it) 1989-12-22
IT8983652A1 IT8983652A1 (it) 1991-06-22
IT1236602B true IT1236602B (it) 1993-03-18

Family

ID=11323655

Family Applications (1)

Application Number Title Priority Date Filing Date
IT08365289A IT1236602B (it) 1989-12-22 1989-12-22 Caratterizzazione quantitativa della distorsione geometrica subita da un profilo superficiale di un "wafer".

Country Status (5)

Country Link
US (1) US5152168A (it)
EP (1) EP0434643B1 (it)
JP (1) JPH04218940A (it)
DE (1) DE69025880T2 (it)
IT (1) IT1236602B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6770138B2 (en) * 2002-01-14 2004-08-03 Taiwan Semiconductor Manufacturing Co., Ltd Pattern for monitoring epitaxial layer washout
TWI233154B (en) * 2002-12-06 2005-05-21 Soitec Silicon On Insulator Method for recycling a substrate

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3376502D1 (en) * 1983-12-27 1988-06-09 Ibm Deutschland Method and apparatus for measuring surface profiles
US4860229A (en) * 1984-01-20 1989-08-22 Ade Corporation Wafer flatness station
US4943719A (en) * 1989-01-17 1990-07-24 The Board Of Trustees Of The Leland Stanford University Microminiature cantilever stylus

Also Published As

Publication number Publication date
EP0434643A2 (en) 1991-06-26
EP0434643A3 (en) 1993-02-10
IT8983652A0 (it) 1989-12-22
IT8983652A1 (it) 1991-06-22
DE69025880D1 (de) 1996-04-18
EP0434643B1 (en) 1996-03-13
JPH04218940A (ja) 1992-08-10
DE69025880T2 (de) 1996-07-25
US5152168A (en) 1992-10-06

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227