IT1221585B - Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione - Google Patents

Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione

Info

Publication number
IT1221585B
IT1221585B IT06611/87A IT661187A IT1221585B IT 1221585 B IT1221585 B IT 1221585B IT 06611/87 A IT06611/87 A IT 06611/87A IT 661187 A IT661187 A IT 661187A IT 1221585 B IT1221585 B IT 1221585B
Authority
IT
Italy
Prior art keywords
capsulate
resin
manufacturing procedure
modular circuit
multiple conductors
Prior art date
Application number
IT06611/87A
Other languages
English (en)
Other versions
IT8706611A0 (it
Inventor
Sergio Palara
Mario Paparo
Spatrisano Antonio Perniciaro
Pietro Giacalone
Original Assignee
S G S Microelettronica Spa Ora
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by S G S Microelettronica Spa Ora filed Critical S G S Microelettronica Spa Ora
Priority to IT06611/87A priority Critical patent/IT1221585B/it
Publication of IT8706611A0 publication Critical patent/IT8706611A0/it
Priority to EP88200961A priority patent/EP0292059B1/en
Priority to DE8888200961T priority patent/DE3869656D1/de
Priority to JP63118387A priority patent/JPS6471165A/ja
Application granted granted Critical
Publication of IT1221585B publication Critical patent/IT1221585B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
IT06611/87A 1987-05-18 1987-05-18 Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione IT1221585B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT06611/87A IT1221585B (it) 1987-05-18 1987-05-18 Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione
EP88200961A EP0292059B1 (en) 1987-05-18 1988-05-13 Modular resin-encapsulated multi-chip circuit package and its manufacturing method
DE8888200961T DE3869656D1 (de) 1987-05-18 1988-05-13 Harzumhuellter mehrchip-modul und verfahren zur herstellung desselben.
JP63118387A JPS6471165A (en) 1987-05-18 1988-05-17 Resin capsule sealed multi-chip modular circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT06611/87A IT1221585B (it) 1987-05-18 1987-05-18 Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione

Publications (2)

Publication Number Publication Date
IT8706611A0 IT8706611A0 (it) 1987-05-18
IT1221585B true IT1221585B (it) 1990-07-12

Family

ID=11121392

Family Applications (1)

Application Number Title Priority Date Filing Date
IT06611/87A IT1221585B (it) 1987-05-18 1987-05-18 Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione

Country Status (4)

Country Link
EP (1) EP0292059B1 (it)
JP (1) JPS6471165A (it)
DE (1) DE3869656D1 (it)
IT (1) IT1221585B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02201949A (ja) * 1989-01-30 1990-08-10 Toshiba Corp 半導体装置
FR2690274B1 (fr) * 1992-04-15 1997-08-22 Motorola Semiconducteurs Boitier pour dispositif a semiconducteur et procede de formation de boitier pour dispositif a semiconducteur.
KR20020005158A (ko) * 2000-07-08 2002-01-17 이창오 사출성형에 의한 냉·온수 파이프 결합용 플랜지의제조방법
DE10125697B4 (de) * 2001-05-25 2019-01-03 Infineon Technologies Ag Leistungshalbleitermodul und Verfahren zum Herstellen eines Leistungshalbleitermoduls
JP4540884B2 (ja) * 2001-06-19 2010-09-08 三菱電機株式会社 半導体装置
JP2011199149A (ja) * 2010-03-23 2011-10-06 Sanken Electric Co Ltd 半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1245458B (de) * 1966-04-27 1967-07-27 Telefunken Patent Integrierte Schaltung, deren Traegerplaettchen gut waermeleitfaehig ist
JPS5753947A (en) * 1980-09-17 1982-03-31 Hitachi Ltd Transistor and electronic device containing it
DE3106376A1 (de) * 1981-02-20 1982-09-09 Siemens AG, 1000 Berlin und 8000 München Halbleiteranordnung mit aus blech ausgeschnittenen anschlussleitern

Also Published As

Publication number Publication date
EP0292059B1 (en) 1992-04-01
EP0292059A2 (en) 1988-11-23
DE3869656D1 (de) 1992-05-07
IT8706611A0 (it) 1987-05-18
EP0292059A3 (en) 1989-03-08
JPS6471165A (en) 1989-03-16

Similar Documents

Publication Publication Date Title
ZA921055B (en) Manufacturing infusion packages
GB9121420D0 (en) Manufacturing infusion packages
EP0320244A3 (en) Electrical contact bump and a package provided with the same
EP0359531A3 (en) Cardioplegia administration set
DE3851339D1 (de) Mit zwei bolzen versehene verbindungsanordnung.
DK61889D0 (da) Genstand omfattende en superleder
EP0365783A3 (en) Multilevel integrated circuit packaging structures
BR9103457A (pt) Circuito de protecao,conector de protecao e processo para a verificacao da capacidade funcional de um conector de protecao
DE59204106D1 (de) Mechanische Verriegelung an einer Steckverbindung zwischen einem elektrischen Schalter und einem Verbindungsstecker.
DE69107633D1 (de) Elektrischer Formgegenstand mit gestapelter Mehrschichtstruktur.
EP0460692A3 (en) Semiconductor memory with failure handling circuit
IT1221585B (it) Circuito modulare a piu' piastrine a semiconduttore in capsulato in resina,e relativo procedimento di fabbrivazione
GB2225953B (en) "tracheostomy devices"
IT1223670B (it) Resistore elettrico stratificato e relativo procedimento di fabbricazione
DE69020127D1 (de) Josephson-integrierte Schaltung mit einem Widerstandselement.
BR8900202A (pt) Composicao e artigo conformado a partir da mesma
GB9405785D0 (en) Manufacturing infusion packages
FR2601512B1 (fr) Connecteur electrique a force d'insertion nulle
IT8621197A0 (it) Tecnica ed apparecchiatura a connettore senza saldatura.
GB8812235D0 (en) Manufacturing electronic devices
EP0541510A3 (en) Wholly aromatic polyamide copolymer
EP0367571A3 (en) Superconducting thick film circuit board, production thereof, thick film superconductor and production thereof
IT8912615A0 (it) Composizione a base di trimebutina a liberazione prolungata e suo procedimento di fabbricazione
EP0278093A3 (en) Semiconductor structure with a multilayer contact
NZ229274A (en) 1,2-dithiol-3-thion-s-oxides and liver-protective medicaments

Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970530