IT1048690B - Stadio divisore di frequenza monoliticamente integrato - Google Patents

Stadio divisore di frequenza monoliticamente integrato

Info

Publication number
IT1048690B
IT1048690B IT2934175A IT2934175A IT1048690B IT 1048690 B IT1048690 B IT 1048690B IT 2934175 A IT2934175 A IT 2934175A IT 2934175 A IT2934175 A IT 2934175A IT 1048690 B IT1048690 B IT 1048690B
Authority
IT
Italy
Prior art keywords
frequency divider
monolithically integrated
divider stage
integrated frequency
stage
Prior art date
Application number
IT2934175A
Other languages
English (en)
Original Assignee
Itt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itt filed Critical Itt
Application granted granted Critical
Publication of IT1048690B publication Critical patent/IT1048690B/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
IT2934175A 1974-11-21 1975-11-17 Stadio divisore di frequenza monoliticamente integrato IT1048690B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742455125 DE2455125C2 (de) 1974-11-21 1974-11-21 Frequenzteilerstufe

Publications (1)

Publication Number Publication Date
IT1048690B true IT1048690B (it) 1980-12-20

Family

ID=5931393

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2934175A IT1048690B (it) 1974-11-21 1975-11-17 Stadio divisore di frequenza monoliticamente integrato

Country Status (4)

Country Link
DE (1) DE2455125C2 (it)
FR (1) FR2292384A1 (it)
GB (1) GB1483028A (it)
IT (1) IT1048690B (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847092B2 (ja) * 1976-12-14 1983-10-20 株式会社東芝 論理回路
US4104732A (en) * 1977-08-02 1978-08-01 Texas Instruments Incorporated Static RAM cell
JPS5570133A (en) * 1978-11-21 1980-05-27 Toshiba Corp Divider circuit
DE10038905C2 (de) * 2000-08-09 2003-04-17 Atmel Germany Gmbh Verfahren zur Erhöhung der Grenzfrequenz bei Flip-Flops

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3728561A (en) * 1971-02-02 1973-04-17 Motorola Inc High speed master-slave flip-flop frequency divider

Also Published As

Publication number Publication date
FR2292384B1 (it) 1980-05-23
GB1483028A (en) 1977-08-17
DE2455125A1 (de) 1976-05-26
DE2455125C2 (de) 1982-05-19
FR2292384A1 (fr) 1976-06-18

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