IT1038696B - Sistema perfezionato per l elaborazione dei dati - Google Patents

Sistema perfezionato per l elaborazione dei dati

Info

Publication number
IT1038696B
IT1038696B IT24024/75A IT2402475A IT1038696B IT 1038696 B IT1038696 B IT 1038696B IT 24024/75 A IT24024/75 A IT 24024/75A IT 2402475 A IT2402475 A IT 2402475A IT 1038696 B IT1038696 B IT 1038696B
Authority
IT
Italy
Prior art keywords
data processing
perfected system
perfected
data
processing
Prior art date
Application number
IT24024/75A
Other languages
English (en)
Italian (it)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/482,816 external-priority patent/US3987410A/en
Priority claimed from US05/482,824 external-priority patent/US3990045A/en
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1038696B publication Critical patent/IT1038696B/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V30/00—Character recognition; Recognising digital ink; Document-oriented image-based pattern recognition
    • G06V30/10—Character recognition
    • G06V30/18—Extraction of features or characteristics of the image
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V30/00—Character recognition; Recognising digital ink; Document-oriented image-based pattern recognition
    • G06V30/10—Character recognition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Logic Circuits (AREA)
  • Character Input (AREA)
IT24024/75A 1974-06-24 1975-06-05 Sistema perfezionato per l elaborazione dei dati IT1038696B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/482,816 US3987410A (en) 1974-06-24 1974-06-24 Array logic fabrication for use in pattern recognition equipments and the like
US05/482,824 US3990045A (en) 1974-06-24 1974-06-24 Array logic fabrication for use in pattern recognition equipments and the like

Publications (1)

Publication Number Publication Date
IT1038696B true IT1038696B (it) 1979-11-30

Family

ID=27047421

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24024/75A IT1038696B (it) 1974-06-24 1975-06-05 Sistema perfezionato per l elaborazione dei dati

Country Status (4)

Country Link
DE (1) DE2527911A1 (cs)
FR (1) FR2276738A1 (cs)
GB (1) GB1476880A (cs)
IT (1) IT1038696B (cs)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0525234D0 (en) 2005-12-12 2006-01-18 Qinetiq Ltd Correlation apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USB618016I5 (cs) * 1968-11-29
FR2191788A5 (cs) * 1972-06-30 1974-02-01 Honeywell Bull

Also Published As

Publication number Publication date
FR2276738B1 (cs) 1977-12-09
DE2527911A1 (de) 1976-01-08
FR2276738A1 (fr) 1976-01-23
GB1476880A (en) 1977-06-16

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