IT1027470B - Procedimento per l assottigliamento di uno strato di materiale semicon duttore - Google Patents

Procedimento per l assottigliamento di uno strato di materiale semicon duttore

Info

Publication number
IT1027470B
IT1027470B IT67299/75A IT6729975A IT1027470B IT 1027470 B IT1027470 B IT 1027470B IT 67299/75 A IT67299/75 A IT 67299/75A IT 6729975 A IT6729975 A IT 6729975A IT 1027470 B IT1027470 B IT 1027470B
Authority
IT
Italy
Prior art keywords
thinning
procedure
layer
semicon ductor
ductor material
Prior art date
Application number
IT67299/75A
Other languages
English (en)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US440656A external-priority patent/US3898141A/en
Priority claimed from US440664A external-priority patent/US3890215A/en
Application filed by Western Electric Co filed Critical Western Electric Co
Application granted granted Critical
Publication of IT1027470B publication Critical patent/IT1027470B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02241III-V semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02258Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • H01L21/30635Electrolytic etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
IT67299/75A 1974-02-08 1975-02-05 Procedimento per l assottigliamento di uno strato di materiale semicon duttore IT1027470B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US440656A US3898141A (en) 1974-02-08 1974-02-08 Electrolytic oxidation and etching of III-V compound semiconductors
US440664A US3890215A (en) 1974-02-08 1974-02-08 Electrochemical thinning of semiconductor devices

Publications (1)

Publication Number Publication Date
IT1027470B true IT1027470B (it) 1978-11-20

Family

ID=27032501

Family Applications (1)

Application Number Title Priority Date Filing Date
IT67299/75A IT1027470B (it) 1974-02-08 1975-02-05 Procedimento per l assottigliamento di uno strato di materiale semicon duttore

Country Status (4)

Country Link
JP (1) JPS50115775A (it)
DE (1) DE2505277A1 (it)
FR (1) FR2260868A1 (it)
IT (1) IT1027470B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4247373A (en) * 1978-06-20 1981-01-27 Matsushita Electric Industrial Co., Ltd. Method of making semiconductor device
DE2906701A1 (de) * 1979-02-21 1980-09-04 Siemens Ag Iii-v-halbleiter-leistungs-mesfet mit verbesserter waermeableitung und verfahren zur herstellung eines solchen transistors
DE3805752A1 (de) * 1988-02-24 1989-08-31 Fraunhofer Ges Forschung Anisotropes aetzverfahren mit elektrochemischem aetzstop

Also Published As

Publication number Publication date
JPS50115775A (it) 1975-09-10
DE2505277A1 (de) 1975-08-14
FR2260868A1 (en) 1975-09-05

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