IN2015DN01261A - - Google Patents

Info

Publication number
IN2015DN01261A
IN2015DN01261A IN1261DEN2015A IN2015DN01261A IN 2015DN01261 A IN2015DN01261 A IN 2015DN01261A IN 1261DEN2015 A IN1261DEN2015 A IN 1261DEN2015A IN 2015DN01261 A IN2015DN01261 A IN 2015DN01261A
Authority
IN
India
Prior art keywords
prefetcher
memory addresses
cache
prefetch
prefetch data
Prior art date
Application number
Other languages
English (en)
Inventor
Donald W Mccauley
Stephen P Thompson
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of IN2015DN01261A publication Critical patent/IN2015DN01261A/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/6028Prefetching based on hints or prefetch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Display Devices Of Pinball Game Machines (AREA)
IN1261DEN2015 2012-08-17 2013-08-15 IN2015DN01261A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/588,622 US9390018B2 (en) 2012-08-17 2012-08-17 Data cache prefetch hints
PCT/US2013/055119 WO2014028724A1 (en) 2012-08-17 2013-08-15 Data cache prefetch hints

Publications (1)

Publication Number Publication Date
IN2015DN01261A true IN2015DN01261A (pt) 2015-07-03

Family

ID=49080980

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1261DEN2015 IN2015DN01261A (pt) 2012-08-17 2013-08-15

Country Status (7)

Country Link
US (1) US9390018B2 (pt)
EP (1) EP2885714B1 (pt)
JP (1) JP6205418B2 (pt)
KR (1) KR101943561B1 (pt)
CN (1) CN104583981B (pt)
IN (1) IN2015DN01261A (pt)
WO (1) WO2014028724A1 (pt)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5347019B2 (ja) * 2009-04-10 2013-11-20 パナソニック株式会社 キャッシュメモリ装置、キャッシュメモリ制御方法、プログラムおよび集積回路
US9348753B2 (en) 2012-10-10 2016-05-24 Advanced Micro Devices, Inc. Controlling prefetch aggressiveness based on thrash events
US20150039837A1 (en) * 2013-03-06 2015-02-05 Condusiv Technologies Corporation System and method for tiered caching and storage allocation
US10013344B2 (en) * 2014-01-14 2018-07-03 Avago Technologies General Ip (Singapore) Pte. Ltd. Enhanced SSD caching
US9378152B2 (en) * 2014-05-09 2016-06-28 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for I/O processing using out-of-band hinting to block driver or storage controller
US9613158B1 (en) * 2014-05-13 2017-04-04 Viasat, Inc. Cache hinting systems
US20160041914A1 (en) * 2014-08-05 2016-02-11 Advanced Micro Devices, Inc. Cache Bypassing Policy Based on Prefetch Streams
US20160054997A1 (en) * 2014-08-22 2016-02-25 Samsung Electronics Co., Ltd. Computing system with stride prefetch mechanism and method of operation thereof
US9817764B2 (en) 2014-12-14 2017-11-14 Via Alliance Semiconductor Co., Ltd Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type
EP3049915B1 (en) 2014-12-14 2020-02-12 VIA Alliance Semiconductor Co., Ltd. Prefetching with level of aggressiveness based on effectiveness by memory access type
US9858191B2 (en) * 2014-12-31 2018-01-02 Samsung Electronics Co., Ltd. Electronic system with data management mechanism and method of operation thereof
US9734072B2 (en) * 2015-03-24 2017-08-15 Macom Connectivity Solutions, Llc Main memory prefetch operation and multiple prefetch operation
US20170017414A1 (en) * 2015-07-15 2017-01-19 Innovium, Inc. System And Method For Implementing Hierarchical Distributed-Linked Lists For Network Devices
US20170017420A1 (en) * 2015-07-15 2017-01-19 Innovium, Inc. System And Method For Enabling High Read Rates To Data Element Lists
US9535696B1 (en) 2016-01-04 2017-01-03 International Business Machines Corporation Instruction to cancel outstanding cache prefetches
US10157136B2 (en) * 2016-03-31 2018-12-18 Intel Corporation Pipelined prefetcher for parallel advancement of multiple data streams
KR20180049338A (ko) * 2016-10-31 2018-05-11 삼성전자주식회사 저장 장치 및 그것의 동작 방법
US11182306B2 (en) * 2016-11-23 2021-11-23 Advanced Micro Devices, Inc. Dynamic application of software data caching hints based on cache test regions
US10318433B2 (en) * 2016-12-20 2019-06-11 Texas Instruments Incorporated Streaming engine with multi dimensional circular addressing selectable at each dimension
US10387320B2 (en) * 2017-05-12 2019-08-20 Samsung Electronics Co., Ltd. Integrated confirmation queues
KR102353859B1 (ko) 2017-11-01 2022-01-19 삼성전자주식회사 컴퓨팅 장치 및 비휘발성 듀얼 인라인 메모리 모듈
KR102482035B1 (ko) * 2017-11-30 2022-12-28 에스케이하이닉스 주식회사 메모리 컨트롤러, 메모리 시스템 및 그 동작 방법
US10963392B1 (en) * 2018-07-30 2021-03-30 Apple Inc. Victim allocations in shared system cache
US11281589B2 (en) * 2018-08-30 2022-03-22 Micron Technology, Inc. Asynchronous forward caching memory systems and methods
US10872458B1 (en) * 2019-09-06 2020-12-22 Apple Inc. Graphics surface addressing
US11093404B2 (en) * 2019-10-14 2021-08-17 EMC IP Holding Company LLC Efficient pre-fetching on a storage system
CN112256205B (zh) * 2020-10-28 2024-06-25 中国科学院微电子研究所 非易失缓存数据预取方法、装置、电子设备及存储介质
US12111765B2 (en) * 2022-04-29 2024-10-08 Cadence Design Systems, Inc. Prefetch circuit for cache memory

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5664147A (en) * 1995-08-24 1997-09-02 International Business Machines Corp. System and method that progressively prefetches additional lines to a distributed stream buffer as the sequentiality of the memory accessing is demonstrated
JP2000242557A (ja) * 1999-02-25 2000-09-08 Nec Corp キャッシュプリフェッチ装置
JP3512678B2 (ja) * 1999-05-27 2004-03-31 富士通株式会社 キャッシュメモリ制御装置および計算機システム
US6438656B1 (en) * 1999-07-30 2002-08-20 International Business Machines Corporation Method and system for cancelling speculative cache prefetch requests
US6449698B1 (en) * 1999-08-26 2002-09-10 International Business Machines Corporation Method and system for bypass prefetch data path
US6446167B1 (en) * 1999-11-08 2002-09-03 International Business Machines Corporation Cache prefetching of L2 and L3
US6643743B1 (en) * 2000-03-31 2003-11-04 Intel Corporation Stream-down prefetching cache
US6523093B1 (en) * 2000-09-29 2003-02-18 Intel Corporation Prefetch buffer allocation and filtering system
US6965982B2 (en) 2001-06-29 2005-11-15 International Business Machines Corporation Multithreaded processor efficiency by pre-fetching instructions for a scheduled thread
US6981099B2 (en) * 2002-12-16 2005-12-27 Sun Microsystems, Inc. Smart-prefetch
US6983356B2 (en) 2002-12-19 2006-01-03 Intel Corporation High performance memory device-state aware chipset prefetcher
CN100444141C (zh) * 2003-05-13 2008-12-17 先进微装置公司 通过串行内存互连以将主机连接至内存模块的系统与方法
TWI258078B (en) 2003-10-07 2006-07-11 Via Tech Inc Pre-fetch controller and method thereof
US7730263B2 (en) * 2006-01-20 2010-06-01 Cornell Research Foundation, Inc. Future execution prefetching technique and architecture
JP2007241927A (ja) 2006-03-13 2007-09-20 Toshiba Corp データ記憶装置及び方法
US7774578B2 (en) 2006-06-07 2010-08-10 Advanced Micro Devices, Inc. Apparatus and method of prefetching data in response to a cache miss
US20090006813A1 (en) 2007-06-28 2009-01-01 Abhishek Singhal Data forwarding from system memory-side prefetcher
US7917702B2 (en) 2007-07-10 2011-03-29 Qualcomm Incorporated Data prefetch throttle
US8156286B2 (en) * 2008-12-30 2012-04-10 Advanced Micro Devices, Inc. Processor and method for using an instruction hint to prevent hardware prefetch from using certain memory accesses in prefetch calculations
US20110072218A1 (en) * 2009-09-24 2011-03-24 Srilatha Manne Prefetch promotion mechanism to reduce cache pollution
US8291171B2 (en) 2009-11-30 2012-10-16 Hewlett-Packard Development Company, L.P. Altering prefetch depth based on ready data
US8856451B2 (en) * 2010-08-26 2014-10-07 Advanced Micro Devices, Inc. Method and apparatus for adapting aggressiveness of a pre-fetcher
US8583894B2 (en) * 2010-09-09 2013-11-12 Advanced Micro Devices Hybrid prefetch method and apparatus
US8949579B2 (en) * 2010-10-04 2015-02-03 International Business Machines Corporation Ineffective prefetch determination and latency optimization
US8856452B2 (en) * 2011-05-31 2014-10-07 Illinois Institute Of Technology Timing-aware data prefetching for microprocessors
US9116815B2 (en) 2012-06-20 2015-08-25 Advanced Micro Devices, Inc. Data cache prefetch throttle
US9122612B2 (en) * 2012-06-25 2015-09-01 Advanced Micro Devices, Inc. Eliminating fetch cancel for inclusive caches
KR101667772B1 (ko) * 2012-08-18 2016-10-19 퀄컴 테크놀로지스, 인크. 프리페칭을 갖는 변환 색인 버퍼
US9286223B2 (en) * 2013-04-17 2016-03-15 Advanced Micro Devices, Inc. Merging demand load requests with prefetch load requests
US9304919B2 (en) * 2013-05-31 2016-04-05 Advanced Micro Devices, Inc. Detecting multiple stride sequences for prefetching

Also Published As

Publication number Publication date
JP2015529356A (ja) 2015-10-05
US20140052927A1 (en) 2014-02-20
JP6205418B2 (ja) 2017-09-27
US9390018B2 (en) 2016-07-12
CN104583981B (zh) 2017-11-14
KR20150043472A (ko) 2015-04-22
KR101943561B1 (ko) 2019-01-29
CN104583981A (zh) 2015-04-29
EP2885714B1 (en) 2017-12-13
WO2014028724A1 (en) 2014-02-20
EP2885714A1 (en) 2015-06-24

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