IN2014MN02369A - - Google Patents

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Publication number
IN2014MN02369A
IN2014MN02369A IN2369MUN2014A IN2014MN02369A IN 2014MN02369 A IN2014MN02369 A IN 2014MN02369A IN 2369MUN2014 A IN2369MUN2014 A IN 2369MUN2014A IN 2014MN02369 A IN2014MN02369 A IN 2014MN02369A
Authority
IN
India
Prior art keywords
circuit
read
buffer
ring buffer
pointers
Prior art date
Application number
Other languages
English (en)
Inventor
Mindong Zhou
Guangning Fu
Wenjia Wu
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014MN02369A publication Critical patent/IN2014MN02369A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H04L25/4927—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using levels matched to the quantisation levels of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)
IN2369MUN2014 2012-06-18 2012-06-18 IN2014MN02369A (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2012/077071 WO2013189009A1 (en) 2012-06-18 2012-06-18 Adaptive offset synchronization of data based on ring buffers

Publications (1)

Publication Number Publication Date
IN2014MN02369A true IN2014MN02369A (enExample) 2015-08-14

Family

ID=49768000

Family Applications (1)

Application Number Title Priority Date Filing Date
IN2369MUN2014 IN2014MN02369A (enExample) 2012-06-18 2012-06-18

Country Status (6)

Country Link
US (1) US9621331B2 (enExample)
EP (1) EP2862090B1 (enExample)
JP (1) JP6113839B2 (enExample)
CN (1) CN104380273B (enExample)
IN (1) IN2014MN02369A (enExample)
WO (1) WO2013189009A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016158063A1 (ja) * 2015-03-30 2016-10-06 ソニーセミコンダクタソリューションズ株式会社 非同期インタフェース
CN107272822A (zh) * 2017-06-16 2017-10-20 郑州云海信息技术有限公司 一种系统时钟监控方法及装置
CN107423148A (zh) * 2017-07-26 2017-12-01 广州路派电子科技有限公司 一种适用于多任务调度环境下的双缓冲协议数据分析系统
CN107797956B (zh) 2017-11-14 2019-04-23 深圳锐越微技术有限公司 双沿触发环形缓冲器及通信系统
US11816110B2 (en) 2021-06-22 2023-11-14 International Business Machines Corporation Processing large query results in a database accelerator environment
KR20250030701A (ko) * 2023-08-25 2025-03-05 에스케이하이닉스 주식회사 스트링 필터 장치 및 그 동작 방법

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61191134A (ja) 1985-02-19 1986-08-25 Mitsubishi Electric Corp プレジオクロナス整合装置
JPH0458646A (ja) 1990-06-28 1992-02-25 Toshiba Corp バッファ管理方式
CN1095584C (zh) * 1995-10-13 2002-12-04 盛群半导体股份有限公司 存储器存取之接口电路及存储器存取的方法
SE509186C2 (sv) 1996-06-25 1998-12-14 Ericsson Telefon Ab L M Anordning och metod vid behandling av redundanssignaler och ett telekommunikationssystem omfattande densamma
US6977897B1 (en) 2000-05-08 2005-12-20 Crossroads Systems, Inc. System and method for jitter compensation in data transfers
CN1213577C (zh) * 2001-03-22 2005-08-03 中兴通讯股份有限公司 一种在成帧器中实现高速率数据复接的方法
JP3879547B2 (ja) 2002-03-18 2007-02-14 三菱電機株式会社 データ同期化装置
US6799227B2 (en) 2003-01-06 2004-09-28 Lsi Logic Corporation Dynamic configuration of a time division multiplexing port and associated direct memory access controller
US7729790B1 (en) * 2003-03-21 2010-06-01 D2Audio Corporation Phase alignment of audio output data in a multi-channel configuration
US7242736B2 (en) 2003-05-15 2007-07-10 Sun Microsystems, Inc. Data transfer
US7234007B2 (en) * 2003-09-15 2007-06-19 Broadcom Corporation Adjustable elasticity FIFO buffer have a number of storage cells equal to a frequency offset times a number of data units in a data stream
US7734674B2 (en) * 2005-08-08 2010-06-08 Freescale Semiconductor, Inc. Fast fourier transform (FFT) architecture in a multi-mode wireless processing system
US7457913B2 (en) * 2006-03-22 2008-11-25 Infineon Technologies Ag Finding a data pattern in a memory
US7657668B2 (en) 2006-08-16 2010-02-02 Qnx Software Systems (Wavemakers), Inc. Clock synchronization of data streams
CN101212490A (zh) 2006-12-30 2008-07-02 财团法人工业技术研究院 储存装置控制器
CN101296217B (zh) 2007-04-24 2011-07-06 中芯国际集成电路制造(上海)有限公司 弹性缓冲装置
JP2010160653A (ja) * 2009-01-07 2010-07-22 Renesas Electronics Corp リングバッファ回路及びその制御回路
US8359420B2 (en) 2009-06-21 2013-01-22 Ablaze Wireless, Inc. External memory based FIFO apparatus
US8634023B2 (en) 2009-07-21 2014-01-21 Qualcomm Incorporated System for video frame synchronization using sub-frame memories
JP5234845B2 (ja) 2010-10-21 2013-07-10 Ｎｅｃアクセステクニカ株式会社 パケット送受信装置、方法及びプログラム
JP5681449B2 (ja) 2010-11-02 2015-03-11 ルネサスエレクトロニクス株式会社 情報処理装置及び携帯端末

Also Published As

Publication number Publication date
EP2862090A1 (en) 2015-04-22
US9621331B2 (en) 2017-04-11
EP2862090B1 (en) 2017-11-08
US20150124841A1 (en) 2015-05-07
JP6113839B2 (ja) 2017-04-12
CN104380273B (zh) 2017-10-24
WO2013189009A1 (en) 2013-12-27
EP2862090A4 (en) 2015-12-30
CN104380273A (zh) 2015-02-25
JP2015528223A (ja) 2015-09-24

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