IN2014MN00902A - - Google Patents

Info

Publication number
IN2014MN00902A
IN2014MN00902A IN902MUN2014A IN2014MN00902A IN 2014MN00902 A IN2014MN00902 A IN 2014MN00902A IN 902MUN2014 A IN902MUN2014 A IN 902MUN2014A IN 2014MN00902 A IN2014MN00902 A IN 2014MN00902A
Authority
IN
India
Prior art keywords
slimbus
data
component
includes sending
low power
Prior art date
Application number
Inventor
Hans Georg Gruber
Magesh Hariharan
Julio Arceo
Suren Mohan
Aris Balatsos
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014MN00902A publication Critical patent/IN2014MN00902A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H04L47/72—Admission control; Resource allocation using reservation actions during connection setup
    • H04L47/726—Reserving resources in multiple paths to be used simultaneously
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Dc Digital Transmission (AREA)

Abstract

A method includes sending data from a first serial low power inter chip media bus (SLIMbus) component to a second SLIMbus component. The method further includes sending the data via at least a first SLIMbus data line of a plurality of SLIMbus data lines.
IN902MUN2014 2011-12-16 2012-12-14 IN2014MN00902A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161576840P 2011-12-16 2011-12-16
US13/714,140 US9929972B2 (en) 2011-12-16 2012-12-13 System and method of sending data via a plurality of data lines on a bus
PCT/US2012/069800 WO2013090752A1 (en) 2011-12-16 2012-12-14 System and method of sending data via a plurality of data lines on a bus

Publications (1)

Publication Number Publication Date
IN2014MN00902A true IN2014MN00902A (en) 2015-04-17

Family

ID=48610089

Family Applications (1)

Application Number Title Priority Date Filing Date
IN902MUN2014 IN2014MN00902A (en) 2011-12-16 2012-12-14

Country Status (7)

Country Link
US (1) US9929972B2 (en)
EP (1) EP2791810B1 (en)
JP (1) JP6173340B2 (en)
KR (1) KR20140113632A (en)
CN (1) CN103975317B (en)
IN (1) IN2014MN00902A (en)
WO (1) WO2013090752A1 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8966302B2 (en) * 2010-06-23 2015-02-24 Broadcom Corporation Method for power management of data buses in electronic devices
US9904652B2 (en) * 2013-11-14 2018-02-27 Qualcomm Incorporated System and method of sending data via additional secondary data lines on a bus
US10509761B2 (en) * 2013-11-14 2019-12-17 Qualcomm Incorporated System and method of sending data via additional secondary data lines on a bus
CN105306380B (en) * 2014-07-17 2018-08-17 炬芯（珠海）科技有限公司 Data transmission method and its device and application
US20160062729A1 (en) * 2014-09-03 2016-03-03 Qualcomm Incorporated Multi-channel audio communication in a serial low-power inter-chip media bus (slimbus) system
US20160142454A1 (en) * 2014-11-14 2016-05-19 Qualcomm Incorporated Multi-channel audio alignment schemes
US20160142455A1 (en) * 2014-11-14 2016-05-19 Qualcomm Incorporated Multi-channel audio alignment schemes
US9841940B2 (en) 2015-06-05 2017-12-12 Qualcomm Incorporated Power reduction through clock management
US10852495B2 (en) 2015-09-25 2020-12-01 Intel Corporation Microelectronic package communication using radio interfaces connected through wiring
CN107643994B (en) * 2016-07-20 2021-11-30 中兴通讯股份有限公司 Terminal, terminal peripheral, signal sending and receiving method and data transmission system
US20180285292A1 (en) * 2017-03-28 2018-10-04 Qualcomm Incorporated System and method of sending data via additional secondary data lines on a bus
CN110287138A (en) * 2019-06-12 2019-09-27 京微齐力(北京)科技有限公司 Method for transmitting signals in a kind of circuit device and device of integrated FPGA and MIPI
CN110825344A (en) * 2019-11-12 2020-02-21 天津飞腾信息技术有限公司 Asynchronous data transmission method and structure
CN111324568A (en) * 2020-02-20 2020-06-23 深圳震有科技股份有限公司 Multidata MDIO bus

Family Cites Families (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE756377A (en) * 1969-09-19 1971-03-01 Burroughs Corp ORDERING DATA COMMUNICATION LINES
US3766531A (en) * 1972-03-13 1973-10-16 Honeywell Inf Systems Communication line multiplexing apparatus having a main memory and an input/output memory
CH584488A5 (en) * 1975-05-05 1977-01-31 Ibm
US4547880A (en) * 1983-05-13 1985-10-15 Able Computer Communication control apparatus for digital devices
US5008880A (en) * 1988-03-14 1991-04-16 Sharp Kabushiki Kaisha Data transmission apparatus
JPH06103898B2 (en) 1991-05-27 1994-12-14 メガソフト株式会社 Parallel transmission method using functions for serial transmission
AU6172694A (en) * 1993-02-09 1994-08-29 Dsc Communications Corporation High-speed packet bus
JP3071976B2 (en) * 1993-03-29 2000-07-31 株式会社日立製作所 Bus type clock supply system for communication systems
US5557614A (en) * 1993-12-22 1996-09-17 Vlsi Technology, Inc. Method and apparatus for framing data in a digital transmission line
US5815692A (en) * 1995-12-15 1998-09-29 National Semiconductor Corporation Distributed clock generator
DE69731074T2 (en) * 1997-04-30 2005-10-06 Hewlett-Packard Development Co., L.P., Houston Arrangement and method for transmitting data over a plurality of channels
US6079024A (en) * 1997-10-20 2000-06-20 Sun Microsystems, Inc. Bus interface unit having selectively enabled buffers
US6275498B1 (en) 1998-03-19 2001-08-14 3Com Corporation Extended PHY addressing
US6101567A (en) * 1998-06-03 2000-08-08 Lucent Technologies Inc. Parallel backplane physical layer interface with scalable data bandwidth
KR100264866B1 (en) * 1998-07-13 2000-09-01 윤종용 Digital trank circuit for providing a plurality of trunk function
JP2000173173A (en) 1998-12-04 2000-06-23 Victor Co Of Japan Ltd Transmission method, transmitter and receiver
JP3465227B2 (en) 2000-01-26 2003-11-10 日本電気エンジニアリング株式会社 Telephone terminal device
US6606675B1 (en) * 2000-07-20 2003-08-12 Rambus, Inc. Clock synchronization in systems with multi-channel high-speed bus subsystems
SE516758C2 (en) * 2000-12-22 2002-02-26 Ericsson Telefon Ab L M Digital bus system
US7305008B2 (en) * 2001-03-14 2007-12-04 Siemens Communications, Inc. Parallel bus LAN
WO2003010939A1 (en) 2001-07-25 2003-02-06 Sony Corporation Interface apparatus
US20030158990A1 (en) * 2001-12-11 2003-08-21 Allen Gregory M. Method and apparatus of disabling the pull-up on a USB type of data line
KR100454126B1 (en) 2002-01-15 2004-10-26 삼성전자주식회사 Information processing system with separated clock line structure
US7337344B2 (en) * 2003-01-31 2008-02-26 Point Grey Research Inc. Methods and apparatus for synchronizing devices on different serial data buses
US7136953B1 (en) * 2003-05-07 2006-11-14 Nvidia Corporation Apparatus, system, and method for bus link width optimization
US7188263B1 (en) * 2003-05-07 2007-03-06 Nvidia Corporation Method and apparatus for controlling power state of a multi-lane serial bus link having a plurality of state transition detectors wherein powering down all the state transition detectors except one
US7469311B1 (en) * 2003-05-07 2008-12-23 Nvidia Corporation Asymmetrical bus
US6973519B1 (en) * 2003-06-03 2005-12-06 Lexar Media, Inc. Card identification compatibility
US20040252800A1 (en) * 2003-06-13 2004-12-16 Kishore Kota Multi-channel line interface unit with on-chip clock management
DE10344818B4 (en) * 2003-09-27 2008-08-14 Qimonda Ag Device for calibrating the relative phase of two received signals of a memory module
US7158536B2 (en) 2004-01-28 2007-01-02 Rambus Inc. Adaptive-allocation of I/O bandwidth using a configurable interconnect topology
TWI233736B (en) * 2004-03-09 2005-06-01 Benq Corp Data rate adjustment device and system thereof
US7197591B2 (en) * 2004-06-30 2007-03-27 Intel Corporation Dynamic lane, voltage and frequency adjustment for serial interconnect
CN100547933C (en) 2004-12-13 2009-10-07 埃派克森微电子有限公司 Systems and methods for clock signal synchronization
US7627069B2 (en) * 2005-01-27 2009-12-01 Rambus Inc. Digital transmit phase trimming
US7245552B2 (en) * 2005-06-22 2007-07-17 Infineon Technologies Ag Parallel data path architecture
JP4844632B2 (en) * 2005-11-29 2011-12-28 エスティー‐エリクソン、ソシエテ、アノニム Bus station and system and method for maintaining bus station synchronization
KR100805836B1 (en) * 2006-07-26 2008-02-21 삼성전자주식회사 Bus width setting device, display device and bus width setting method
JP5205819B2 (en) * 2007-06-06 2013-06-05 日本電気株式会社 Communication system, packet scheduling method thereof, and transmission node
US7949817B1 (en) * 2007-07-31 2011-05-24 Marvell International Ltd. Adaptive bus profiler
CA2632031A1 (en) * 2007-09-05 2009-03-05 Faisal Dada Aligning data on parallel transmission lines
EP3133756A1 (en) * 2007-09-14 2017-02-22 Semtech Corporation High-speed serialized related components, systems and methods
US7809869B2 (en) * 2007-12-20 2010-10-05 International Business Machines Corporation Throttling a point-to-point, serial input/output expansion subsystem within a computing system
US8103918B2 (en) * 2008-03-25 2012-01-24 Arm Limited Clock control during self-test of multi port memory
US8661173B2 (en) 2008-03-31 2014-02-25 Intel Corporation USB data striping
US8341303B2 (en) 2008-06-30 2012-12-25 Intel Corporation Asymmetrical universal serial bus communications
US20100005212A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Providing a variable frame format protocol in a cascade interconnected memory system
US8707079B2 (en) * 2008-09-04 2014-04-22 Freescale Semiconductor, Inc. Method and apparatus for transmitting data
US8495310B2 (en) * 2008-09-22 2013-07-23 Qimonda Ag Method and system including plural memory controllers and a memory access control bus for accessing a memory device
US20100191995A1 (en) 2009-01-26 2010-07-29 Koby Levy In-Band Sleep Protocol for Embedded Bus
JP5333753B2 (en) * 2009-04-07 2013-11-06 Ｎｌｔテクノロジー株式会社 Liquid crystal display device and signal processing method
US8621128B2 (en) * 2009-12-04 2013-12-31 St-Ericsson Sa Methods and systems for reliable link startup
US9355051B2 (en) * 2010-09-10 2016-05-31 Cypress Semiconductor Corporation Apparatus, method, and manufacture for using a read preamble to optimize data capture
US8762760B2 (en) * 2010-09-14 2014-06-24 Xilinx, Inc. Method and apparatus for adaptive power control in a multi-lane communication channel
JP5598220B2 (en) * 2010-09-30 2014-10-01 ソニー株式会社 Transmission device, transmission method, reception device, reception method, and transmission / reception system
US8681839B2 (en) * 2010-10-27 2014-03-25 International Business Machines Corporation Calibration of multiple parallel data communications lines for high skew conditions
JP5290473B2 (en) * 2010-11-19 2013-09-18 シャープ株式会社 Data transfer circuit, data transfer method, display device, host side device, and electronic device
US8745455B2 (en) * 2010-11-23 2014-06-03 Intel Corporation Providing an on-die logic analyzer (ODLA) having reduced communications
US9043634B2 (en) 2011-04-29 2015-05-26 Qualcomm Incorporated Methods, systems, apparatuses, and computer-readable media for waking a SLIMbus without toggle signal
US9065674B2 (en) 2011-04-29 2015-06-23 Qualcomm Incorporated Multiple slimbus controllers for slimbus components
US9736548B2 (en) * 2011-06-08 2017-08-15 Qualcomm Incorporated Multipath rate adaptation

Also Published As

Publication number Publication date
JP6173340B2 (en) 2017-08-02
EP2791810B1 (en) 2016-11-16
US9929972B2 (en) 2018-03-27
US20130156044A1 (en) 2013-06-20
EP2791810A1 (en) 2014-10-22
KR20140113632A (en) 2014-09-24
JP2015506042A (en) 2015-02-26
CN103975317B (en) 2017-06-20
CN103975317A (en) 2014-08-06
WO2013090752A1 (en) 2013-06-20

Similar Documents

Publication Publication Date Title
IN2014MN00902A (en)
EP2710544A4 (en) Transforming data for rendering an insurability decision
GB2506783A (en) Enabling a computing device to utilize another computing device
MX2013008337A (en) Assembly for assisting the removal from storage and transfer of wire.
IN2014MN00769A (en)
EP4024163B8 (en) Quick mount system for computer terminal
EP2798514A4 (en) System for transferring states between electronic devices
EP2625655A4 (en) System and method for indexing electronic discovery data
GB2494919B (en) Method for connecting printed circuit boards.
WO2013006517A3 (en) Method and apparatus for configurable thermal management
EP2590309B8 (en) Semiconductor power module
GB2512214A (en) Multi-touch interface schemes
GB2524852A (en) Delay-compensated error indication signal
EP2676172A4 (en) Direct generation semiconductor ircm laser system
EP2673803A2 (en) Power semiconductor module
IL238806A0 (en) Electrical connection interface for connecting electrical leads for high speed data transmission
GB2491979B (en) Methods and apparatus for data access by a reprogrammable circuit module
GB2530228A (en) System and method for installing solar panels
WO2013002868A3 (en) Circuits and methods for memory
HUE041527T2 (en) Multi-channel audio communication in a serial low-power inter-chip media bus (slimbus) system
MY169836A (en) Techniques for serial interface charging
TWI563392B (en) System on chip, electronic system including the same, and method of operating the same
GB201302920D0 (en) Managing a storage device using a hybrid controller
DE112012001581A5 (en) Electrical line for transmitting data signals
FR2989795B1 (en) PARAMETRAL AUTOMATIC DRIVING SYSTEM FOR AN AIRCRAFT