IN2014DN07649A - - Google Patents

Info

Publication number
IN2014DN07649A
IN2014DN07649A IN7649DEN2014A IN2014DN07649A IN 2014DN07649 A IN2014DN07649 A IN 2014DN07649A IN 7649DEN2014 A IN7649DEN2014 A IN 7649DEN2014A IN 2014DN07649 A IN2014DN07649 A IN 2014DN07649A
Authority
IN
India
Application number
Other languages
English (en)
Inventor
Takashi Mitsui
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of IN2014DN07649A publication Critical patent/IN2014DN07649A/en

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
IN7649DEN2014 2012-05-01 2014-09-12 IN2014DN07649A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2012/061580 WO2013164887A1 (ja) 2012-05-01 2012-05-01 信号同期システム、マルチプロセッサ、及びノード同期システム

Publications (1)

Publication Number Publication Date
IN2014DN07649A true IN2014DN07649A (ja) 2015-05-15

Family

ID=49514297

Family Applications (1)

Application Number Title Priority Date Filing Date
IN7649DEN2014 IN2014DN07649A (ja) 2012-05-01 2014-09-12

Country Status (5)

Country Link
JP (1) JP5850143B2 (ja)
KR (1) KR101578751B1 (ja)
CN (1) CN104115450B (ja)
IN (1) IN2014DN07649A (ja)
WO (1) WO2013164887A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015229462A (ja) * 2014-06-06 2015-12-21 富士電機株式会社 同期システム
JP6400553B2 (ja) * 2015-09-28 2018-10-03 ファナック株式会社 ユニット間での同期制御機能を有する数値制御システム
JP7310495B2 (ja) * 2019-09-26 2023-07-19 オムロン株式会社 制御システム、情報処理装置およびプログラム

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5327468A (en) * 1992-06-19 1994-07-05 Westinghouse Electric Corp. Synchronization of time-of-day clocks in a distributed processing network system
JPH0877103A (ja) * 1994-09-07 1996-03-22 Hitachi Ltd バス同期化方式及びこれを用いた装置,システム
JP2003216595A (ja) * 2002-01-25 2003-07-31 Mitsubishi Electric Corp マルチプロセッサ同期方式及びパケット及び中継装置及びプロセッサ装置及びマルチプロセッサ同期方法
JP4241343B2 (ja) * 2003-11-26 2009-03-18 富士電機システムズ株式会社 送信タイミング決定方法、バス使用権の調停方法、ネットワークシステム、プログラム
EP1755316A4 (en) * 2004-06-08 2009-08-12 Mitsubishi Electric Corp MOBILE DEVICE
US8549341B2 (en) * 2008-08-29 2013-10-01 Netlogic Microsystems, Inc. System and method for reducing latency associated with timestamps in a multi-core, multi-threaded processor

Also Published As

Publication number Publication date
WO2013164887A1 (ja) 2013-11-07
KR20140121849A (ko) 2014-10-16
CN104115450B (zh) 2017-02-22
KR101578751B1 (ko) 2015-12-18
JP5850143B2 (ja) 2016-02-03
JPWO2013164887A1 (ja) 2015-12-24
CN104115450A (zh) 2014-10-22

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