IN2014DE00713A - - Google Patents

Download PDF

Info

Publication number
IN2014DE00713A
IN2014DE00713A IN713DE2014A IN2014DE00713A IN 2014DE00713 A IN2014DE00713 A IN 2014DE00713A IN 713DE2014 A IN713DE2014 A IN 713DE2014A IN 2014DE00713 A IN2014DE00713 A IN 2014DE00713A
Authority
IN
India
Prior art keywords
read
optimal
word line
read operation
level
Prior art date
Application number
Inventor
Kyung-Ryun Kim
Sang-Yong Yoon
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IN2014DE00713A publication Critical patent/IN2014DE00713A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2254—Calibration

Abstract

In a method of reading data from a nonvolatile memory device, a first read operation for memory cells coupled to a first word line is performed by applying a first read voltage to the first word line, a first read retry is performed to obtain an optimal read level regardless or independent of whether data read by the first read operation is error-correctable, and the optimal read level is stored to perform a subsequent second read operation using the optimal read level. Related methods and devices are also discussed.
IN713DE2014 2013-03-15 2014-03-12 IN2014DE00713A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020130027722A KR102131802B1 (en) 2013-03-15 2013-03-15 Method of reading data from a nonvolatile memory device, nonvolatile memory device, and method of operating a memory system

Publications (1)

Publication Number Publication Date
IN2014DE00713A true IN2014DE00713A (en) 2015-06-19

Family

ID=50555212

Family Applications (1)

Application Number Title Priority Date Filing Date
IN713DE2014 IN2014DE00713A (en) 2013-03-15 2014-03-12

Country Status (9)

Country Link
US (1) US9412471B2 (en)
JP (1) JP6580302B2 (en)
KR (1) KR102131802B1 (en)
CN (1) CN104051016B (en)
AU (1) AU2014200492B2 (en)
DE (1) DE102014103129B4 (en)
IN (1) IN2014DE00713A (en)
NL (1) NL2012398B1 (en)
TW (1) TWI631564B (en)

Families Citing this family (78)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11614893B2 (en) 2010-09-15 2023-03-28 Pure Storage, Inc. Optimizing storage device access based on latency
WO2015037159A1 (en) * 2013-09-13 2015-03-19 株式会社 東芝 Semiconductor memory device and memory system
US9411521B2 (en) * 2014-05-30 2016-08-09 Macronix International Co., Ltd. Method and apparatus for improving sequential memory read preformance
KR20160011939A (en) * 2014-07-23 2016-02-02 에스케이하이닉스 주식회사 Data storage device and operating method thereof
US9953722B2 (en) 2015-01-08 2018-04-24 SK Hynix Inc. Methods of system optimization by over-sampling read
KR102277521B1 (en) 2015-01-23 2021-07-16 삼성전자주식회사 Storage device and read reclaim and reading method thereof
KR102265220B1 (en) * 2015-03-09 2021-06-16 에스케이하이닉스 주식회사 Controller, semiconductor memory system and operating method thereof
US9564239B2 (en) * 2015-03-16 2017-02-07 Sk Hynix Memory Solutions Inc. Memory controller and operating method thereof
US9613691B2 (en) * 2015-03-27 2017-04-04 Intel Corporation Apparatus and method for drift cancellation in a memory
TWI582779B (en) * 2015-04-14 2017-05-11 群聯電子股份有限公司 Read voltage level estimating method, memory storage device and memory controlling circuit unit
TWI562152B (en) * 2015-05-29 2016-12-11 Phison Electronics Corp Decoding method, memory storage device and memory control circuit unit
KR102302433B1 (en) 2015-06-10 2021-09-16 삼성전자주식회사 Nonvolatile memory device and erasing method thereof
KR20170004693A (en) * 2015-07-03 2017-01-11 에스케이하이닉스 주식회사 Memory device controller of and operating method thereof
CN107017026B (en) * 2015-10-28 2020-04-28 威盛电子股份有限公司 Nonvolatile memory device and reading method thereof
CN106653087A (en) * 2015-10-28 2017-05-10 光宝电子(广州)有限公司 A solid state memory device and a related reading and controlling method thereof
KR102378541B1 (en) * 2015-11-27 2022-03-25 에스케이하이닉스 주식회사 Data storage device and operating method thereof
KR20170065076A (en) 2015-12-02 2017-06-13 에스케이하이닉스 주식회사 Memory system and operating method of memory system
KR102420588B1 (en) * 2015-12-04 2022-07-13 삼성전자주식회사 Nonvolatine memory device, memory system, method of operating nonvolatile memory device, and method of operating memory system
KR20170075065A (en) 2015-12-22 2017-07-03 에스케이하이닉스 주식회사 Operating method of memory system
CN105529050B (en) * 2015-12-31 2019-09-03 记忆科技(深圳)有限公司 A method of reduction is read out time of origin time-out error to UWL
KR102529171B1 (en) * 2016-02-26 2023-05-04 삼성전자주식회사 Memory device diagnosis system
CN107179960B (en) * 2016-03-09 2020-05-26 群联电子股份有限公司 Decoding method, memory control circuit unit and memory storage device
KR102585221B1 (en) * 2016-04-21 2023-10-05 삼성전자주식회사 Memory Device, Memory System and Method of Operating Memory Device
TWI612525B (en) * 2016-07-07 2018-01-21 群聯電子股份有限公司 Decoding method, memory storage device and memory control circuit unit
US9953709B2 (en) 2016-09-06 2018-04-24 Toshiba Memory Corporation Semiconductor memory device and memory system
US10289484B2 (en) * 2016-09-16 2019-05-14 Micron Technology, Inc. Apparatuses and methods for generating probabilistic information with current integration sensing
US10756816B1 (en) 2016-10-04 2020-08-25 Pure Storage, Inc. Optimized fibre channel and non-volatile memory express access
KR20180051272A (en) * 2016-11-08 2018-05-16 에스케이하이닉스 주식회사 Data storage device and operating method thereof
CN108241549B (en) * 2016-12-27 2021-04-30 北京兆易创新科技股份有限公司 ECC-based NAND data Read Retry error correction method and NAND controller
KR20180083689A (en) * 2017-01-13 2018-07-23 삼성전자주식회사 Non-volatile memory device for reading operation with optimized read voltage
TWI615852B (en) * 2017-01-19 2018-02-21 群聯電子股份有限公司 Memory retry-read method, memory storage device and memory control circuit unit
US10095568B2 (en) 2017-02-08 2018-10-09 Seagate Technology Llc Background reads to condition programmed semiconductor memory cells
KR102302187B1 (en) * 2017-03-13 2021-09-14 삼성전자주식회사 Methods of operating nonvolatile memory devices and nonvolatile memory devices
US11237908B2 (en) 2017-03-29 2022-02-01 SK Hynix Inc. Memory system and operating method thereof
KR20180110412A (en) 2017-03-29 2018-10-10 에스케이하이닉스 주식회사 Memory system and operating method thereof
US10229749B2 (en) * 2017-03-31 2019-03-12 Samsung Electronics Co., Ltd. Nonvolatile memory storage system
US10381090B2 (en) * 2017-03-31 2019-08-13 Samsung Electronics Co., Ltd. Operation method of nonvolatile memory device and storage device
US11947814B2 (en) 2017-06-11 2024-04-02 Pure Storage, Inc. Optimizing resiliency group formation stability
KR102353363B1 (en) * 2017-08-14 2022-01-20 에스케이하이닉스 주식회사 Operating method of memory system
KR102384733B1 (en) * 2017-09-26 2022-04-08 삼성전자주식회사 Semiconductor memory devices, methods of operating semiconductor memory devices and memory systems
KR102496272B1 (en) * 2017-09-27 2023-02-03 삼성전자주식회사 Non volatile memory device and operating method of the same
US10355893B2 (en) 2017-10-02 2019-07-16 Micron Technology, Inc. Multiplexing distinct signals on a single pin of a memory device
US11403241B2 (en) 2017-10-02 2022-08-02 Micron Technology, Inc. Communicating data with stacked memory dies
US10725913B2 (en) 2017-10-02 2020-07-28 Micron Technology, Inc. Variable modulation scheme for memory device access or operation
US10490245B2 (en) 2017-10-02 2019-11-26 Micron Technology, Inc. Memory system that supports dual-mode modulation
US10446198B2 (en) * 2017-10-02 2019-10-15 Micron Technology, Inc. Multiple concurrent modulation schemes in a memory system
US10860475B1 (en) 2017-11-17 2020-12-08 Pure Storage, Inc. Hybrid flash translation layer
CN108052279B (en) * 2017-11-23 2020-06-19 深圳市江波龙电子股份有限公司 Method, device, equipment and storage medium for improving performance of flash memory
CN110246533B (en) * 2018-03-09 2020-11-13 建兴储存科技(广州)有限公司 Failure mode detection method and error correction method for solid-state storage device
US10446200B2 (en) * 2018-03-19 2019-10-15 Micron Technology, Inc. Memory device with configurable input/output interface
JP2019169211A (en) 2018-03-22 2019-10-03 東芝メモリ株式会社 Memory system
KR102396743B1 (en) * 2018-07-16 2022-05-12 에스케이하이닉스 주식회사 Memory device, Memory system including the memory device and Method of operating the memory device
US10475492B1 (en) 2018-07-27 2019-11-12 Macronix International Co., Ltd. Circuit and method for read latency control
CN110797069B (en) * 2018-08-01 2021-10-22 群联电子股份有限公司 Voltage adjusting method, memory control circuit unit and memory storage device
US11500570B2 (en) 2018-09-06 2022-11-15 Pure Storage, Inc. Efficient relocation of data utilizing different programming modes
US11520514B2 (en) 2018-09-06 2022-12-06 Pure Storage, Inc. Optimized relocation of data based on data characteristics
KR102599117B1 (en) * 2018-11-14 2023-11-06 삼성전자주식회사 Storage device monitoring and storing on cell counts of blocks and operating method thereof
KR102651440B1 (en) * 2018-11-15 2024-03-27 에스케이하이닉스 주식회사 Storage device and operating method thereof
US10915395B2 (en) * 2018-11-16 2021-02-09 Micron Technology, Inc. Read retry with targeted auto read calibrate
US11714572B2 (en) 2019-06-19 2023-08-01 Pure Storage, Inc. Optimized data resiliency in a modular storage system
KR20210027980A (en) * 2019-09-03 2021-03-11 에스케이하이닉스 주식회사 Memory controller and operating method thereof
KR20210045214A (en) * 2019-10-16 2021-04-26 에스케이하이닉스 주식회사 Memory device and operating method thereof
US11029889B1 (en) * 2019-12-20 2021-06-08 Western Digital Technologies, Inc. Soft bit read mode selection for non-volatile memory
US11494254B2 (en) * 2019-12-20 2022-11-08 Cnex Labs, Inc. Storage system with predictive adjustment mechanism and method of operation thereof
US11217319B2 (en) * 2020-02-28 2022-01-04 SK Hynix Inc. Read threshold optimization systems and methods by multi-dimensional search
US11507297B2 (en) 2020-04-15 2022-11-22 Pure Storage, Inc. Efficient management of optimal read levels for flash storage systems
US11416338B2 (en) 2020-04-24 2022-08-16 Pure Storage, Inc. Resiliency scheme to enhance storage performance
US11474986B2 (en) 2020-04-24 2022-10-18 Pure Storage, Inc. Utilizing machine learning to streamline telemetry processing of storage media
US11768763B2 (en) 2020-07-08 2023-09-26 Pure Storage, Inc. Flash secure erase
US11513974B2 (en) 2020-09-08 2022-11-29 Pure Storage, Inc. Using nonce to control erasure of data blocks of a multi-controller storage system
US11681448B2 (en) 2020-09-08 2023-06-20 Pure Storage, Inc. Multiple device IDs in a multi-fabric module storage system
KR20220079235A (en) * 2020-12-04 2022-06-13 에스케이하이닉스 주식회사 Storage device and operating method thereof
US11487455B2 (en) 2020-12-17 2022-11-01 Pure Storage, Inc. Dynamic block allocation to optimize storage system performance
CN112506443B (en) * 2020-12-22 2022-01-04 长江存储科技有限责任公司 Three-dimensional memory reading method and device
US11630593B2 (en) 2021-03-12 2023-04-18 Pure Storage, Inc. Inline flash memory qualification in a storage system
US11562790B1 (en) * 2021-06-30 2023-01-24 Micron Technology, Inc. Systems and methods for adaptive self-referenced reads of memory devices
US11832410B2 (en) 2021-09-14 2023-11-28 Pure Storage, Inc. Mechanical energy absorbing bracket apparatus
KR20230085625A (en) * 2021-12-07 2023-06-14 에스케이하이닉스 주식회사 Memory device and operating method thereof

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6282145B1 (en) * 1999-01-14 2001-08-28 Silicon Storage Technology, Inc. Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system
US7038928B1 (en) 2004-11-17 2006-05-02 Macronix International Co., Ltd. Method of determining optimal voltages for operating two-side non-volatile memory and the operating methods
US7954037B2 (en) * 2005-10-25 2011-05-31 Sandisk Il Ltd Method for recovering from errors in flash memory
US7450425B2 (en) * 2006-08-30 2008-11-11 Micron Technology, Inc. Non-volatile memory cell read failure reduction
US7941590B2 (en) 2006-11-06 2011-05-10 Marvell World Trade Ltd. Adaptive read and write systems and methods for memory cells
KR100907218B1 (en) 2007-03-28 2009-07-10 삼성전자주식회사 Apparatus for controlling read level and method using the same
US7849383B2 (en) 2007-06-25 2010-12-07 Sandisk Corporation Systems and methods for reading nonvolatile memory using multiple reading schemes
KR100888842B1 (en) * 2007-06-28 2009-03-17 삼성전자주식회사 Flash memory device optimizing read voltage and method for optimizing read voltage thereof
KR100859258B1 (en) * 2007-09-10 2008-09-18 주식회사 하이닉스반도체 Apparatus for flash memory device and operating method thereof
KR101406279B1 (en) * 2007-12-20 2014-06-13 삼성전자주식회사 Semiconductor memory device and method analyzing read fail thereof
KR100953047B1 (en) 2007-12-28 2010-04-14 주식회사 하이닉스반도체 Method of operating a non volatile memory device
KR20090117172A (en) 2008-05-08 2009-11-12 삼성전자주식회사 Memory device and memory data read method
US7957187B2 (en) 2008-05-09 2011-06-07 Sandisk Corporation Dynamic and adaptive optimization of read compare levels based on memory cell threshold voltage distribution
US7808831B2 (en) 2008-06-30 2010-10-05 Sandisk Corporation Read disturb mitigation in non-volatile memory
KR100996009B1 (en) 2009-02-02 2010-11-22 주식회사 하이닉스반도체 Non volatile memory device and method of operating the same
US7653779B1 (en) * 2009-02-04 2010-01-26 Gene Fein Memory storage using a look-up table
KR101626528B1 (en) 2009-06-19 2016-06-01 삼성전자주식회사 Flash memory device and data read method thereof
US8072805B2 (en) 2009-08-18 2011-12-06 Skymedi Corporation Method and system of finding a read voltage for a flash memory
JP5349256B2 (en) 2009-11-06 2013-11-20 株式会社東芝 Memory system
US8737136B2 (en) 2010-07-09 2014-05-27 Stec, Inc. Apparatus and method for determining a read level of a memory cell based on cycle information
KR101727704B1 (en) 2010-10-04 2017-04-18 삼성전자주식회사 Method for changing read parameter for improving read performance and apparatuses using the same
KR20120046868A (en) * 2010-10-29 2012-05-11 에스케이하이닉스 주식회사 Semiconductor memory apparatus, semiconductor system and method of sensing data
KR101792868B1 (en) * 2010-11-25 2017-11-02 삼성전자주식회사 Flash memory device and reading method thereof
JP2012133832A (en) 2010-12-20 2012-07-12 Samsung Yokohama Research Institute Co Ltd Nonvolatile semiconductor memory device and read-out voltage detection method
JP2012203957A (en) * 2011-03-25 2012-10-22 Toshiba Corp Memory system
US8510636B2 (en) * 2011-04-01 2013-08-13 Intel Corporation Dynamic read channel calibration for non-volatile memory devices
KR101756111B1 (en) 2011-04-15 2017-07-10 삼성전자 주식회사 A method of operating the memory controller, the memory controller, a memory device and a memory system
EP2549482B1 (en) 2011-07-22 2018-05-23 SanDisk Technologies LLC Apparatus, system and method for determining a configuration parameter for solid-state storage media
KR20130027722A (en) 2011-09-08 2013-03-18 양원동 Check valve caps installed buttle
KR20130034522A (en) * 2011-09-28 2013-04-05 삼성전자주식회사 Data read method from nonvolatile memory, and apparatus for executing the same
US8839073B2 (en) * 2012-05-04 2014-09-16 Lsi Corporation Zero-one balance management in a solid-state disk controller
US8938659B2 (en) * 2012-05-04 2015-01-20 Lsi Corporation Low-density parity-check decoder disparity preprocessing

Also Published As

Publication number Publication date
US20140281770A1 (en) 2014-09-18
DE102014103129B4 (en) 2022-11-03
JP6580302B2 (en) 2019-09-25
US9412471B2 (en) 2016-08-09
AU2014200492B2 (en) 2019-01-17
KR20140112968A (en) 2014-09-24
NL2012398B1 (en) 2016-07-22
NL2012398A (en) 2014-09-16
CN104051016A (en) 2014-09-17
TW201435887A (en) 2014-09-16
CN104051016B (en) 2019-07-26
AU2014200492A1 (en) 2014-10-02
JP2014182864A (en) 2014-09-29
DE102014103129A1 (en) 2014-09-18
KR102131802B1 (en) 2020-07-08
TWI631564B (en) 2018-08-01

Similar Documents

Publication Publication Date Title
IN2014DE00713A (en)
WO2014164134A3 (en) Detecting effect of corrupting event on preloaded data in non-volatile memory
TW201614505A (en) Memory cell and memory array
ZA201902298B (en) Method and device for writing stored data into storage medium based on flash memory
WO2014150505A3 (en) System and method of determining reading voltages of a data storage device
EP3462326A4 (en) Nvme device, and methods for reading and writing nvme data
TW201614651A (en) Apparatuses and methods for performing an exclusive or operation using sensing circuitry
TW201614669A (en) Error processing method, memory storage device and memory controlling circuit unit
GB201301474D0 (en) Implementing enhanced data read for multi-level cell (MLC) memory using threshold voltage-drift or reistance drift tolerant moving baseline memory data
GB201301473D0 (en) Implementing Enhanced Data Partial-Erase for Multi-Level Cell (MLC) Memory Using Threshold Voltage-Drift or Resistance Drift Tolerant Moving Baseline Memory
TWI561982B (en) Data storage device and flash memory control method
WO2013016397A3 (en) Post-write read in non-volatile memories using comparison of data as written in binary and multi-state formats
MX364783B (en) Solid state drive architectures.
EP2955633A4 (en) Data erasing method and device for flash memory
EP2779175A3 (en) Retention check logic for non-volatile memory
IN2014MN01055A (en)
IN2014MU00845A (en)
EP2698718A4 (en) Data reading and writing method, device and storage system
TW201207854A (en) Semiconductor device and method for driving the same
SG10201900584TA (en) Method Of Writing Data In Nonvolatile Memory Device, Method Of Erasing Data In Nonvolatile Memory Device, And Nonvolatile Memory Device Performing The Same
TWI561981B (en) Data reading method, memory control circuit unit and memory storage apparatus
EP2966577A4 (en) Electronic reading device and method for extracting and saving text information thereof, and storage medium
EP3642842A4 (en) Improved sense amplifier circuit for reading data in a flash memory cell
EP3007076A4 (en) Translation word order information output device, translation word order information output method, and recording medium
EP2985717A4 (en) Data erasing device, data erasing method, program, and storage medium