IN2014MU00845A - - Google Patents
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- Publication number
- IN2014MU00845A IN2014MU00845A IN845MU2014A IN2014MU00845A IN 2014MU00845 A IN2014MU00845 A IN 2014MU00845A IN 845MU2014 A IN845MU2014 A IN 845MU2014A IN 2014MU00845 A IN2014MU00845 A IN 2014MU00845A
- Authority
- IN
- India
- Prior art keywords
- page
- data
- read
- memory
- storage controller
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7204—Capacity control, e.g. partitioning, end-of-life degradation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7206—Reconfiguration of flash memory system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Human Computer Interaction (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Quality & Reliability (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Library & Information Science (AREA)
Abstract
A storage controller is configured to find a last-written page in a block in a memory by sending a command to the memory to read a page of data, receiving at least some of the data from that page, and analyzing the at least some of the data from that page to determine if that page is a written page. In one embodiment, the storage controller instructs the memory to read the page of data using a sense time that is shorter than a sense time used to read a page of data in response to a read request from a host controller. Additionally or alternatively, the amount of the data received by the storage controller can be less than the amount of data received when reading a page of data in response to a read request from a host controller.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IN845MU2014 IN2014MU00845A (en) | 2014-03-13 | 2014-03-13 | |
US14/278,782 US9459881B2 (en) | 2014-03-13 | 2014-05-15 | Storage module and method for improving boot time during block binary searches |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IN845MU2014 IN2014MU00845A (en) | 2014-03-13 | 2014-03-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
IN2014MU00845A true IN2014MU00845A (en) | 2015-09-25 |
Family
ID=54069007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IN845MU2014 IN2014MU00845A (en) | 2014-03-13 | 2014-03-13 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9459881B2 (en) |
IN (1) | IN2014MU00845A (en) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9728278B2 (en) * | 2014-10-24 | 2017-08-08 | Micron Technology, Inc. | Threshold voltage margin analysis |
KR102336458B1 (en) * | 2015-07-30 | 2021-12-08 | 삼성전자주식회사 | Non-volatile memory device and test system therof |
US10372533B2 (en) * | 2016-03-28 | 2019-08-06 | Via Technologies, Inc. | Non-volatile memory apparatus and empty page detection method thereof |
CN106847342B (en) * | 2016-03-28 | 2020-05-29 | 威盛电子股份有限公司 | Nonvolatile memory device and empty page detection method thereof |
CN107544925B (en) * | 2016-06-24 | 2020-05-08 | 爱思开海力士有限公司 | Memory system and method for accelerating boot time |
KR102593178B1 (en) * | 2016-08-19 | 2023-10-25 | 에스케이하이닉스 주식회사 | Memory device, memory system having the same, and operating method thereof |
US10977186B2 (en) * | 2017-11-21 | 2021-04-13 | Micron Technology, Inc. | Last written page searching |
CN108280029B (en) * | 2018-02-28 | 2022-03-22 | 郑州云海信息技术有限公司 | NorFlash chip-based data erasing method and system |
US10481818B2 (en) * | 2018-02-28 | 2019-11-19 | Micron Technology, Inc. | Meta data processing during startup of storage devices |
US10635352B2 (en) * | 2018-05-10 | 2020-04-28 | Western Digital Technologies, Inc. | Distributed flash interface module processing |
JP7030636B2 (en) | 2018-07-12 | 2022-03-07 | キオクシア株式会社 | Memory system and its control method |
CN109343865B (en) * | 2018-09-21 | 2021-09-28 | 四川长虹电器股份有限公司 | Method for improving EEPROM (electrically erasable programmable read-Only memory) programming efficiency |
US11126368B2 (en) * | 2019-04-30 | 2021-09-21 | Western Digital Technologies, Inc. | Systems and methods for finding a last good page in NAND open block |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9921896B2 (en) * | 2007-08-30 | 2018-03-20 | Virident Systems, Llc | Shutdowns and data recovery to avoid read errors weak pages in a non-volatile memory system |
KR102127284B1 (en) * | 2013-07-01 | 2020-06-26 | 삼성전자주식회사 | Nonvolatile memory device and managing method thereof |
KR102085096B1 (en) * | 2013-07-30 | 2020-03-05 | 삼성전자주식회사 | Operating method for nonvolatile memory device and operating method for memory controller controlling nonvolatile memory device |
-
2014
- 2014-03-13 IN IN845MU2014 patent/IN2014MU00845A/en unknown
- 2014-05-15 US US14/278,782 patent/US9459881B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20150261613A1 (en) | 2015-09-17 |
US9459881B2 (en) | 2016-10-04 |
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