IL67591A - Segregatable array data processor system - Google Patents

Segregatable array data processor system

Info

Publication number
IL67591A
IL67591A IL67591A IL6759182A IL67591A IL 67591 A IL67591 A IL 67591A IL 67591 A IL67591 A IL 67591A IL 6759182 A IL6759182 A IL 6759182A IL 67591 A IL67591 A IL 67591A
Authority
IL
Israel
Prior art keywords
segregatable
data processor
processor system
array data
array
Prior art date
Application number
IL67591A
Other languages
English (en)
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of IL67591A publication Critical patent/IL67591A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Eye Examination Apparatus (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
IL67591A 1982-01-26 1982-12-29 Segregatable array data processor system IL67591A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/342,671 US4498134A (en) 1982-01-26 1982-01-26 Segregator functional plane for use in a modular array processor

Publications (1)

Publication Number Publication Date
IL67591A true IL67591A (en) 1985-11-29

Family

ID=23342787

Family Applications (1)

Application Number Title Priority Date Filing Date
IL67591A IL67591A (en) 1982-01-26 1982-12-29 Segregatable array data processor system

Country Status (6)

Country Link
US (1) US4498134A (fr)
EP (1) EP0086052B1 (fr)
JP (1) JPS58169663A (fr)
DE (1) DE3372418D1 (fr)
HK (1) HK96687A (fr)
IL (1) IL67591A (fr)

Families Citing this family (87)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59160267A (ja) * 1983-03-02 1984-09-10 Hitachi Ltd ベクトル処理装置
US4580215A (en) * 1983-03-08 1986-04-01 Itt Corporation Associative array with five arithmetic paths
US4621339A (en) * 1983-06-13 1986-11-04 Duke University SIMD machine using cube connected cycles network architecture for vector processing
FR2569290B1 (fr) * 1984-08-14 1986-12-05 Trt Telecom Radio Electr Processeur pour le traitement de signal et structure de multitraitement hierarchisee comportant au moins un tel processeur
US5247689A (en) * 1985-02-25 1993-09-21 Ewert Alfred P Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments
US4819152A (en) * 1985-04-05 1989-04-04 Raytheon Company Method and apparatus for addressing a memory by array transformations
US5047917A (en) * 1985-07-12 1991-09-10 The California Institute Of Technology Apparatus for intrasystem communications within a binary n-cube including buffer lock bit
US4720780A (en) * 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
US4748585A (en) * 1985-12-26 1988-05-31 Chiarulli Donald M Processor utilizing reconfigurable process segments to accomodate data word length
US4790026A (en) * 1985-12-31 1988-12-06 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Programmable pipelined image processor
US4809169A (en) * 1986-04-23 1989-02-28 Advanced Micro Devices, Inc. Parallel, multiple coprocessor computer architecture having plural execution modes
US5146606A (en) * 1986-09-18 1992-09-08 Digital Equipment Corporation Systems for interconnecting and configuring plurality of memory elements by control of mode signals
US5230079A (en) * 1986-09-18 1993-07-20 Digital Equipment Corporation Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register
US6108763A (en) * 1986-09-18 2000-08-22 Grondalski; Robert S. Simultaneous parity generating/reading circuit for massively parallel processing systems
US4985832A (en) * 1986-09-18 1991-01-15 Digital Equipment Corporation SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors
US5175865A (en) * 1986-10-28 1992-12-29 Thinking Machines Corporation Partitioning the processors of a massively parallel single array processor into sub-arrays selectively controlled by host computers
US4811214A (en) * 1986-11-14 1989-03-07 Princeton University Multinode reconfigurable pipeline computer
US4933895A (en) * 1987-07-10 1990-06-12 Hughes Aircraft Company Cellular array having data dependent processing capabilities
US5257395A (en) * 1988-05-13 1993-10-26 International Business Machines Corporation Methods and circuit for implementing and arbitrary graph on a polymorphic mesh
AU4212089A (en) * 1988-09-01 1990-04-02 Ronald L. YIN An improved modular processor, a computer incorporating same, and a method of operating same
US4970724A (en) * 1988-12-22 1990-11-13 Hughes Aircraft Company Redundancy and testing techniques for IC wafers
US5253308A (en) * 1989-06-21 1993-10-12 Amber Engineering, Inc. Massively parallel digital image data processor using pixel-mapped input/output and relative indexed addressing
CA2021192A1 (fr) * 1989-07-28 1991-01-29 Malcolm A. Mumme Processeur maille synchrone simplifie
EP0485594A4 (en) * 1990-05-30 1995-02-01 Adaptive Solutions Inc Mechanism providing concurrent computational/communications in simd architecture
US5377129A (en) * 1990-07-12 1994-12-27 Massachusetts Institute Of Technology Particle interaction processing system
US5617577A (en) * 1990-11-13 1997-04-01 International Business Machines Corporation Advanced parallel array processor I/O connection
WO1992009555A1 (fr) * 1990-11-21 1992-06-11 The Dow Chemical Company Procede de preparation de carbonates de phenyle
US5175858A (en) * 1991-03-04 1992-12-29 Adaptive Solutions, Inc. Mechanism providing concurrent computational/communications in SIMD architecture
US6282583B1 (en) * 1991-06-04 2001-08-28 Silicon Graphics, Inc. Method and apparatus for memory access in a matrix processor computer
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5493687A (en) * 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
US5371684A (en) 1992-03-31 1994-12-06 Seiko Epson Corporation Semiconductor floor plan for a register renaming circuit
DE69311330T2 (de) * 1992-03-31 1997-09-25 Seiko Epson Corp Befehlsablauffolgeplanung von einem risc-superskalarprozessor
EP0638183B1 (fr) * 1992-05-01 1997-03-05 Seiko Epson Corporation Systeme et procede permettant d'annuler des instructions dans un microprocesseur superscalaire
US5628021A (en) * 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
EP1107111A3 (fr) 1992-12-31 2002-02-06 Seiko Epson Corporation Système et procédé pour changer la désignation de registres
US5848260A (en) * 1993-12-10 1998-12-08 Exa Corporation Computer system for simulating physical processes
US5640335A (en) * 1995-03-23 1997-06-17 Exa Corporation Collision operators in physical process simulation
US7266725B2 (en) * 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
WO2002029600A2 (fr) 2000-10-06 2002-04-11 Pact Informationstechnologie Gmbh Procede et dispositif
US5913070A (en) * 1996-01-16 1999-06-15 Tm Patents, L.P. Inter-connector for use with a partitionable massively parallel processing system
US6125418A (en) * 1996-11-27 2000-09-26 Compaq Computer Corporation Method and apparatus for enabling a computer user to convert a computer system to an intelligent I/O system
DE19651075A1 (de) * 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) * 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
JP3961028B2 (ja) * 1996-12-27 2007-08-15 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト データフロープロセッサ（ｄｆｐ）の自動的なダイナミックアンロード方法並びに２次元または３次元のプログラミング可能なセルストラクチャを有するモジュール（ｆｐｇａ，ｄｐｇａ等）
DE19654846A1 (de) * 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
US6542998B1 (en) * 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704728A1 (de) * 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
DE19704742A1 (de) * 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
US7003660B2 (en) * 2000-06-13 2006-02-21 Pact Xpp Technologies Ag Pipeline configuration unit protocols and communication
DE10081643D2 (de) 1999-06-10 2002-05-29 Pact Inf Tech Gmbh Sequenz-Partitionierung auf Zellstrukturen
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US9037807B2 (en) * 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US20090210653A1 (en) * 2001-03-05 2009-08-20 Pact Xpp Technologies Ag Method and device for treating and processing data
US7844796B2 (en) * 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US20090300262A1 (en) * 2001-03-05 2009-12-03 Martin Vorbach Methods and devices for treating and/or processing data
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US20070299993A1 (en) * 2001-03-05 2007-12-27 Pact Xpp Technologies Ag Method and Device for Treating and Processing Data
US7581076B2 (en) * 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
WO2002103532A2 (fr) * 2001-06-20 2002-12-27 Pact Xpp Technologies Ag Procede de traitement de donnees
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) * 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7577822B2 (en) * 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
EP1470478A2 (fr) * 2002-01-18 2004-10-27 PACT XPP Technologies AG Procede de compilation
EP1483682A2 (fr) * 2002-01-19 2004-12-08 PACT XPP Technologies AG Processeur reconfigurable
EP1514193B1 (fr) 2002-02-18 2008-07-23 PACT XPP Technologies AG Systemes de bus et procede de reconfiguration
EP1518186A2 (fr) * 2002-03-21 2005-03-30 PACT XPP Technologies AG Procede et dispositif de traitement de donnees
US8914590B2 (en) * 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
WO2004021176A2 (fr) * 2002-08-07 2004-03-11 Pact Xpp Technologies Ag Procede et dispositif de traitement de donnees
US20110238948A1 (en) * 2002-08-07 2011-09-29 Martin Vorbach Method and device for coupling a data processing unit and a data processing array
US7657861B2 (en) * 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
JP4388895B2 (ja) * 2002-09-06 2009-12-24 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト リコンフィギュアラブルなシーケンサ構造
JP4542308B2 (ja) * 2002-12-16 2010-09-15 株式会社ソニー・コンピュータエンタテインメント 信号処理用デバイス及び情報処理機器
JP2006524850A (ja) * 2003-04-04 2006-11-02 ペーアーツェーテー　イクスペーペー　テクノロジーズ　アクチエンゲゼルシャフト データ処理方法およびデータ処理装置
EP1634182A2 (fr) * 2003-06-17 2006-03-15 PACT XPP Technologies AG Dispositif et procede de traitement de donnees
JP4700611B2 (ja) * 2003-08-28 2011-06-15 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト データ処理装置およびデータ処理方法
US7281942B2 (en) * 2005-11-18 2007-10-16 Ideal Industries, Inc. Releasable wire connector
US8250503B2 (en) 2006-01-18 2012-08-21 Martin Vorbach Hardware definition method including determining whether to implement a function as hardware or software
WO2010011813A1 (fr) * 2008-07-23 2010-01-28 Alkermes, Inc. Complexe de trospium et ses compostions pharmaceutiques
CA3051501A1 (fr) 2017-01-26 2018-08-02 Exa Corporation Visualisations d'ecoulements a phases multiples basees sur un temps d'occupation de fluide
US11714040B2 (en) 2018-01-10 2023-08-01 Dassault Systemes Simulia Corp. Determining fluid flow characteristics of porous mediums
US11530598B2 (en) 2018-08-21 2022-12-20 Dassault Systemes Simulia Corp. Determination of oil removed by gas via miscible displacement in reservoir rock
US11847391B2 (en) 2020-06-29 2023-12-19 Dassault Systemes Simulia Corp. Computer system for simulating physical processes using surface algorithm
US11907625B2 (en) 2020-12-29 2024-02-20 Dassault Systemes Americas Corp. Computer simulation of multi-phase and multi-component fluid flows including physics of under-resolved porous structures

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3701976A (en) * 1970-07-13 1972-10-31 Bell Telephone Labor Inc Floating point arithmetic unit for a parallel processing computer
US3979728A (en) * 1973-04-13 1976-09-07 International Computers Limited Array processors
US4065808A (en) * 1975-01-25 1977-12-27 U.S. Philips Corporation Network computer system
US4174514A (en) * 1976-11-15 1979-11-13 Environmental Research Institute Of Michigan Parallel partitioned serial neighborhood processors
US4270170A (en) * 1978-05-03 1981-05-26 International Computers Limited Array processor
US4270169A (en) * 1978-05-03 1981-05-26 International Computers Limited Array processor
US4251861A (en) * 1978-10-27 1981-02-17 Mago Gyula A Cellular network of processors
US4412303A (en) * 1979-11-26 1983-10-25 Burroughs Corporation Array processor architecture
US4374414A (en) * 1980-06-26 1983-02-15 Gte Automatic Electric Labs Inc. Arbitration controller providing for access of a common resource by a duplex plurality of central processing units
US4388686A (en) * 1980-10-20 1983-06-14 General Electric Company Communication system for distributed control arrangement
US4384273A (en) * 1981-03-20 1983-05-17 Bell Telephone Laboratories, Incorporated Time warp signal recognition processor for matching signal patterns
US4412285A (en) * 1981-04-01 1983-10-25 Teradata Corporation Multiprocessor intercommunication system and method

Also Published As

Publication number Publication date
HK96687A (en) 1987-12-24
JPS58169663A (ja) 1983-10-06
US4498134A (en) 1985-02-05
EP0086052A3 (en) 1984-04-04
EP0086052A2 (fr) 1983-08-17
DE3372418D1 (en) 1987-08-13
EP0086052B1 (fr) 1987-07-08
JPH0230535B2 (fr) 1990-07-06

Similar Documents

Publication Publication Date Title
IL67591A (en) Segregatable array data processor system
DE3376590D1 (en) Data processing system
DE3379851D1 (en) Data processing system
AU560384B2 (en) Data processor
GB2069734B (en) Distributed data processing system
AU2111583A (en) Data processor
GB2123589B (en) Data reporting system
GB8317623D0 (en) Data transfer system
GB8316361D0 (en) Multiple data processing system
GB2129984B (en) Data processor
GB8600902D0 (en) Data collection system
EP0100097A3 (en) Computer controlled imaging system
ZA837618B (en) Data processing systems
GB2086624B (en) Multi processor computer system
ZA833544B (en) Data processing systems
GB2115587B (en) Data processing system
ZA831146B (en) Distributed data processing system
GB8315751D0 (en) Data processing system
GB8334334D0 (en) Data processor
AU570657B2 (en) Data processor
GB8323914D0 (en) Computer system
JPS57169990A (en) Processor for data
ZA834008B (en) Data processing system
JPS57202194A (en) Data processor
JPS57162028A (en) Data processor

Legal Events

Date Code Title Description
RH Patent void