IL27728A - Anodic treatment to alter solubility of dielectric films used in the fabrication of semiconductor devices - Google Patents
Anodic treatment to alter solubility of dielectric films used in the fabrication of semiconductor devicesInfo
- Publication number
- IL27728A IL27728A IL27728A IL2772867A IL27728A IL 27728 A IL27728 A IL 27728A IL 27728 A IL27728 A IL 27728A IL 2772867 A IL2772867 A IL 2772867A IL 27728 A IL27728 A IL 27728A
- Authority
- IL
- Israel
- Prior art keywords
- fabrication
- semiconductor devices
- dielectric films
- films used
- anodic treatment
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/469—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Formation Of Insulating Films (AREA)
- Weting (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US54933866A | 1966-05-11 | 1966-05-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
IL27728A true IL27728A (en) | 1970-09-17 |
Family
ID=24192584
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL27728A IL27728A (en) | 1966-05-11 | 1967-04-03 | Anodic treatment to alter solubility of dielectric films used in the fabrication of semiconductor devices |
Country Status (7)
Country | Link |
---|---|
US (1) | US3438873A (xx) |
BE (1) | BE696330A (xx) |
ES (1) | ES341094A1 (xx) |
GB (1) | GB1188507A (xx) |
IL (1) | IL27728A (xx) |
NL (1) | NL6706537A (xx) |
NO (1) | NO118985B (xx) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3979768A (en) * | 1966-03-23 | 1976-09-07 | Hitachi, Ltd. | Semiconductor element having surface coating comprising silicon nitride and silicon oxide films |
US3645807A (en) * | 1966-12-26 | 1972-02-29 | Hitachi Ltd | Method for manufacturing a semiconductor device |
USRE28402E (en) * | 1967-01-13 | 1975-04-29 | Method for controlling semiconductor surface potential | |
US3767463A (en) * | 1967-01-13 | 1973-10-23 | Ibm | Method for controlling semiconductor surface potential |
US3887407A (en) * | 1967-02-03 | 1975-06-03 | Hitachi Ltd | Method of manufacturing semiconductor device with nitride oxide double layer film |
DE1614435B2 (de) * | 1967-02-23 | 1979-05-23 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen von aus Germanium bestehenden, doppeldiffundierten Halbleiteranordnungen |
US3537921A (en) * | 1967-02-28 | 1970-11-03 | Motorola Inc | Selective hydrofluoric acid etching and subsequent processing |
US3541676A (en) * | 1967-12-18 | 1970-11-24 | Gen Electric | Method of forming field-effect transistors utilizing doped insulators as activator source |
US3807038A (en) * | 1969-05-22 | 1974-04-30 | Mitsubishi Electric Corp | Process of producing semiconductor devices |
US3663279A (en) * | 1969-11-19 | 1972-05-16 | Bell Telephone Labor Inc | Passivated semiconductor devices |
DE2047998A1 (de) * | 1970-09-30 | 1972-04-06 | Licentia Gmbh | Verfahren zum Herstellen einer Planaranordnung |
US3924321A (en) * | 1970-11-23 | 1975-12-09 | Harris Corp | Radiation hardened mis devices |
US3707656A (en) * | 1971-02-19 | 1972-12-26 | Ibm | Transistor comprising layers of silicon dioxide and silicon nitride |
US4058887A (en) * | 1971-02-19 | 1977-11-22 | Ibm Corporation | Method for forming a transistor comprising layers of silicon dioxide and silicon nitride |
US3760242A (en) * | 1972-03-06 | 1973-09-18 | Ibm | Coated semiconductor structures and methods of forming protective coverings on such structures |
FR2466101A1 (fr) * | 1979-09-18 | 1981-03-27 | Thomson Csf | Procede de formation de couches de silicium polycristallin localisees sur des zones recouvertes de silice d'une plaquette de silicium et application a la fabrication d'un transistor mos non plan autoaligne |
US4596627A (en) * | 1983-02-28 | 1986-06-24 | Hewlett-Packard Company | Etching a layer over a semiconductor |
US6006763A (en) * | 1995-01-11 | 1999-12-28 | Seiko Epson Corporation | Surface treatment method |
DE59704079D1 (de) | 1996-05-24 | 2001-08-23 | Epcos Ag | Elektronisches bauelement, insbesondere mit akustischen oberflächenwellen arbeitendes bauelement - ofw-bauelement |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2974075A (en) * | 1957-10-28 | 1961-03-07 | Bell Telephone Labor Inc | Treatment of semiconductive devices |
US3160539A (en) * | 1958-09-08 | 1964-12-08 | Trw Semiconductors Inc | Surface treatment of silicon |
US3088888A (en) * | 1959-03-31 | 1963-05-07 | Ibm | Methods of etching a semiconductor device |
-
1966
- 1966-05-11 US US549338A patent/US3438873A/en not_active Expired - Lifetime
-
1967
- 1967-03-30 BE BE696330D patent/BE696330A/xx unknown
- 1967-04-03 IL IL27728A patent/IL27728A/xx unknown
- 1967-04-18 GB GB07721/67A patent/GB1188507A/en not_active Expired
- 1967-05-10 ES ES341094A patent/ES341094A1/es not_active Expired
- 1967-05-10 NL NL6706537A patent/NL6706537A/xx unknown
- 1967-05-10 NO NO168092A patent/NO118985B/no unknown
Also Published As
Publication number | Publication date |
---|---|
US3438873A (en) | 1969-04-15 |
GB1188507A (en) | 1970-04-15 |
BE696330A (xx) | 1967-09-01 |
ES341094A1 (es) | 1968-06-16 |
NO118985B (xx) | 1970-03-09 |
NL6706537A (xx) | 1967-11-13 |
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