IE87492B1 - Failure position system and method for integrated circuit based on continuous laser source - Google Patents
Failure position system and method for integrated circuit based on continuous laser source Download PDFInfo
- Publication number
- IE87492B1 IE87492B1 IE20220219A IE20220219A IE87492B1 IE 87492 B1 IE87492 B1 IE 87492B1 IE 20220219 A IE20220219 A IE 20220219A IE 20220219 A IE20220219 A IE 20220219A IE 87492 B1 IE87492 B1 IE 87492B1
- Authority
- IE
- Ireland
- Prior art keywords
- scanning
- circuit
- sample
- failure
- detected
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 39
- 238000012360 testing method Methods 0.000 claims abstract description 26
- 238000010586 diagram Methods 0.000 claims abstract description 23
- 230000001678 irradiating effect Effects 0.000 claims abstract description 16
- 230000008859 change Effects 0.000 claims description 51
- 238000009826 distribution Methods 0.000 claims description 16
- 230000003287 optical effect Effects 0.000 claims description 13
- 230000008569 process Effects 0.000 claims description 11
- 230000002159 abnormal effect Effects 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000004458 analytical method Methods 0.000 abstract description 5
- 238000011160 research Methods 0.000 abstract description 2
- 239000000523 sample Substances 0.000 description 90
- 238000005516 engineering process Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 238000003384 imaging method Methods 0.000 description 3
- 230000003993 interaction Effects 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 241001208007 Procas Species 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000399 optical microscopy Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004626 scanning electron microscopy Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Health & Medical Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Biochemistry (AREA)
- Life Sciences & Earth Sciences (AREA)
- Health & Medical Sciences (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
A failure position system and method for an integrated circuit based on a continuous laser source are provided. The method includes: irradiating a circuit sample to be tested based on an infrared laser to obtain scanning data of the circuit sample to be tested; taking photos of the circuit sample to be tested based on an infrared camera to obtain a circuit layout diagram; and comparing the scanning data with the circuit layout diagram to obtain a failure position point. It solves a problem of positioning the failure point of resistive failure in the integrated circuit, achieves accurate and quick position for resistive failure and gate damage of the transistor in the integrated circuit. The test efficiency and the positioning accuracy of the failure position in the integrated circuit are improved, which provides technical support for the research of integrated circuit failure analysis.
Description
FAILURE POSITION SYSTEM AND lVIETHOD FOR INTEGRATED CIRCUIT BASED ON CONTINUOUS LASER SOURCE TECHNICAL :FIELD
id="p-1"
[0001] The present invention relates to the field of failure position for an integrated circuit in particular to a failure position system and method for the integrated circuit based on a continuous laser source.
BACKGROUND
id="p-2"
[0002] In modern times, integrated circuits have a very wide range of applications. It is important for the integrated circuits to ensure stable operation over a long period of time. The reliability of the integrated circuits serves as a standard for stable operation. Level of the reliability largely depends on the: manufacturing quality of thge integrated circuits. In modern integrated circuit introduce different defects to the chip. The eXistence of the defects does not necessarily lead to direct damage to the chip, but rather to the failure of one or several specific units. During the wafer testing and packaging testing stages of the chip, fault analysis is performed on a failure chip, a failure point is positioned, and a cause of the failure is detected, which can greatly help improve the yield of chip production.
id="p-3"
[0003] With the improvement of chip integration, the reduction of feature size, and the increase of thickness for the metal interconnect layer, it has become increasingly difficult to accurately position the failure points of the integrated circuits. Therefore, accurate and efficient position technology is also the key to failure analysis if the integrated circuits. The; pos1tion technologies required for different types of failures are no; the same. A failure having an abnormal resistance characteristic (high resistance, low resistance) is one of failure types commonly found in the integrated circuits, and common cases include short circuit of metal interconnection lines, introduction of foreign materials, and the like. Another common type of failure is gate damage of a transistor, including cracking, breakdown, etc. Whether it is the failure of the metal interconnection lines or the failure of the transistor, due to their small size, traditional observation methods or optical microscope positioning technologies are difficult to implement, and the efficiency of using probes for point by point testing is too low. Therefore, the rapid and accurate positioning technology for resistive failure and gate damage of the transistor in large-scale integrated circuits is urgently to be solved. / /1 012023 SUNINIARY
id="p-4"
[0004] To solve the problem of difficult positioning in resistive failure and gate damage of a transistor the present invention provides the following solutions: a failure position system and method for an integrated circuit based 011 a C(a1tinuous laser source including:
id="p-5"
[0005] irradiating a circuit sample to be tested based 011 an infrared laser to obtain scanning data of the circuit sample to be tested;
id="p-6"
[0006] taking photos of the circuit sample to be tested based 011 an infrared camera to obtain a circuit layout diagram; and
id="p-7"
[0007] comparing the scanning data with the circuit layout diagram to obtain a failure position point,
id="p-8"
[0008] wherein before the irradiating the circuit sample to be tested based 011 the infrared laser, the method includes:
id="p-9"
[0009] pre-heating the infrared laser, fixingmthe circuit sample to be tested 011 a programmable mobile platforni, and powering the programn’ifible mobile platform,
id="p-10"
[0010] obtaining the scanning data of the circuit sample to be tested includes:
id="p-11"
[0011] focusing laser of the infrared laser 011 an active region of the circuit sample to be tested by an optical path adjustment system;
id="p-12"
[0012] setting scanning parameters of the infrared laser and scanning programs of the programmable mobile platform; and
id="p-13"
[0013] adjusting a power supply system for constant voltage power supply, then irradiating the circuit sample to be tested with the laser to obtain current scanning change data.
id="p-14"
[0014] In an embodiment, before obtaining the failure position point, the method further includes:
id="p-15"
[0015] obtaining a current change distribution map based 011 the current scanning change data and points of the current change distribution map.
id="p-16"
[0016] In an embodiment, obtaining the scanning data of the circuit sample to be tested includes:
id="p-17"
[0017] focusing the laser of the infrared laser 011 the active region of the circuit sample to be tested by the optical path adjustment system;
id="p-18"
[0018] setting the scanning parameters of the infrared laser and scanning the programs of the programmable mobile platform; and
id="p-19"
[0019] adjusting the power supply system for constant current power supply, then irradiating the circuit sample to be tested with the laser to obtain voltage scanning change data. [10/
id="p-21"
[0021] obtaining a voltage change distributi%n map based 011 the voltage /10/ scanning change data /1 012023 and the circuit layout diagram; and obtaining the failure position point based on abnormal change points of the voltage change distribution map.
id="p-22"
[0022] A failure position system for an integrated circuit based on a continuous laser source, ( including:
id="p-23"
[0023] an infrared laser configured to scan a circuit sample to be tested to obtain scanning data;
id="p-24"
[0024] an infrared camera configured to take photos of the circuit sample to be tested to obtain a circuit layout diagram;
id="p-25"
[0025] a power supply system configured to provide power to the failure position system; and
id="p-26"
[0026] a testing system configured to monitor changes in the circuit sample to be tested during a scanning process.
id="p-27"
[0027] In an embodiment, the failure position system further includes:
id="p-28"
[0028] an optical path adjustment system configured to focus laser of the infrared laser on an active region of;& the circuit sample to be tested) to achieve accurate incidencg of the laser; tested and perform three-aXis movement in a predetermined manner; and
id="p-30"
[0030] a computer control system configured to set scanning parameters of the infrared laser and scanning programs of the programmable mobile platform to change parameters of the infrared laser and move positions of the programmable mobile platform.
id="p-31"
[0031] In an embodiment, the power supply system includes a Direct Current (DC) voltage source and a DC current source, where the DC voltage source is configured to provide a constant voltage, and the DC current source is configured to provide a constant current.
id="p-32"
[0032] In an embodiment, the testing system includes a voltmeter and an ammeter, where the voltmeter lS configured to monitor voltage changes of the circuit sample:to be tested during a scanning procefi under constant current powé supply to obtain voltage scanning change data; the ammeter is configured to monitor current changes of the circuit sample to be tested during the scanning process under constant voltage power supply to obtain current scanning change data.
id="p-33"
[0033] The present invention discloses the following technical effects:
id="p-34"
[0034] The failure position system and method for the integrated circuit based on the continuous laser source provided in the present invention can be used for positioning resistive failure points in ultra large scale integrated circuits. The system and method have characteristics of high accuracy, high efficiency, and low cost, compared with conventional optical microscopy, scanning electron microscopy, X-ray diffraction and other technologies.
id="p-35"
[0035] The prfient invention provides the agialysis method for positioniigg failure points under (:0/02/1 conditions and given controF conditions, resulting in moFe reliable positioning various testingc /1 012023 results.
id="p-36"
[0036] In the present invention, the detection accuracy reaches 11A and 111V levels, and the positioning accuracy reaches 0.1 u 111, thereby improving the test and positioning accuracy for the failure positionEng of the integrated circuit.
id="p-37"
[0037] The present invention applies the thermal effect 111 the interaction between the laser scanning and the semiconductor material to the positioning technology, achieving the positioning monitoring effect of high positioning accuracy, high detection efficiency and low cost test. The present invention solves the problem of positioning the failure point of resistive failure 111 the integrated circuit, achieves quick, accurate and reliable failure point position for resistive failure and gate damage of the transistor 111 the integrated circuit, and provides technical support for the research of integrated circuit failure analysis.
id="p-38"
[0038] In ordeE to more clearly illustrate thé embodiments of the present invention or technical solutions 111 the related art, the accompanying drawings used 111 the embodiments will now be described briefly. It is obvious that the drawings 111 the following description are only some embodiments of the invention, and that those skilled 111 the art can obtain other drawings from these drawings without any creative efforts
id="p-39"
[0039] FIG. 1 a schematic diagram of the system structure of an embodiment of the present invention;
id="p-40"
[0040] FIG. 2 is a technical schematic diagram of an embodiment of the present invention; and
id="p-41"
[0041] FIG. 3 shows test results of an embodiment of the present invention. /2023 /2023 DETAILED DESCRIPTION OF THE ElVIBODIlVIENTS
id="p-42"
[0042] In the following, the technical solutions 111 the embodiments of the present invention will be clearly and completely described with reference to the drawings 111 the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all the embodiments thereof Based 011 the embodiments of the present invention, all other embodiments obtained by those skilled 111 the art without any creative efforts shall fall within the scope of the present invention.
id="p-43"
[0043] For a better understanding of above intention, features and advantages of the present disclosure, the disclosure will be described 111 details by reference to the accompanying drawings $211 0/2023
id="p-44"
[0044] A failufe position method for an integrated circuit based 011 a c611tinuous laser source /1 012023 includes:
id="p-45"
[0045] irradiating a circuit sample to be tested based on a continuous laser with 13 10 nm to obtain scanning data of the circuit sample to be tested; circuit layout dicagram; and
id="p-47"
[0047] comparing the scanning data of the circuit sample to be tested with the circuit layout diagram of the circuit sample to be tested to obtain a failure position point.
id="p-48"
[0048] Before the irradiating the circuit sample to be tested based on the continuous laser with nm, the method further includes:
id="p-49"
[0049] pre-heating the infrared laser for the circuit sample to be tested, fiXing the circuit sample to be tested on a programmable mobile platform, and powering the programmable mobile platform for the circuit sample to be tested.
id="p-50"
[0050] Obtainiélg the scanning data of the cirgcuit sample to be tested inclugles: of the circuit sample to be tested by an optical path adjustment system;
id="p-52"
[0052] setting scanning parameters of the infrared laser for the circuit sample to be tested and scanning programs of the programmable mobile platform for the circuit sample to be tested; and
id="p-53"
[0053] adjusting a power supply system for constant voltage power supply, then irradiating the circuit sample to be tested with the laser to obtain current scanning change data.
id="p-54"
[0054] Before obtaining the failure position point, the method for the circuit sample to be tested further includes:
id="p-55"
[0055] obtaining a current change distribution map based on the current scanning change data of the circuit sampéle to be tested and the circuit lgyout diagram of the circuit sagginple to be tested; and points of the current change distribution map of the circuit sample to be tested based.
id="p-56"
[0056] Obtaining the scanning data of the circuit sample to be tested includes:
id="p-57"
[0057] focusing the laser of the infrared laser for the circuit sample to be tested based on the active region of the circuit sample to be tested by the optical path adjustment system;
id="p-58"
[0058] setting scanning parameters of the continuous laser with 13 lOnm for the circuit sample to be tested and scanning programs of the programmable mobile platform for the circuit sample to be tested; and
id="p-59"
[0059] adjusting the power supply system for constant current power supply, then irradiating the
id="p-60"
[0060] Before %btaining the failure positiongpoint of the circuit sample togbe tested, the method /1 012023 further includes:
id="p-61"
[0061] obtaining a voltage change distribution map based on the voltage scanning change data of the circuit sample to be tested and the circuit layout diagram of the circuit sample to be tested; and points of the voltage change distribution mapgof the circuit sample to be tested.
id="p-62"
[0062] A failure position system for an integrated circuit based on a continuous laser source, includes:
id="p-63"
[0063] a continuous laser with 13 lOnm configured to scan a circuit sample to be tested to obtain scanning data;
id="p-64"
[0064] an infrared camera configured to take photos of the circuit sample to be tested to obtain a circuit layout diagram;
id="p-65"
[0065] a power supply system configured to provide power to the failure position system for the circuit sample to be tested; and [2023 scanning process.
id="p-67"
[0067] The failure position system for the circuit sample to be tested further includes:
id="p-68"
[0068] an optical path adjustment system configured to focus laser of the infrared laser for the circuit sample to be tested on an active region of the circuit sample to be tested to achieve accurate incidence of the laser for the circuit sample to be tested;
id="p-69"
[0069] a programmable mobile platform configured to carry an integrated circuit sample to be tested and perform three-aXis movement in a predetermined manner; and
id="p-70"
[0070] a computer control system configured to set scanning parameters of the infrared laser for the circuit sampgle to be tested and scanning programs of the programmable mobile platform for the circuit sample to be tested to change paraneters of the infrared laser oi? the circuit sample to be tested and move positions of the programmable mobile platform for the circuit sample to be tested.
id="p-71"
[0071] The power supply system for the circuit sample to be tested includes a Direct Current (DC) voltage source and a DC current source, where the DC voltage source for the circuit sample to be tested is configured to provide a constant voltage, and the DC current source for the circuit sample to be tested is configured to provide a constant current.
id="p-72"
[0072] The testing system for the circuit sample to be tested includes a voltmeter and an ammeter, where the voltmeter for the circuit sample to be tested is configured to monitor voltage changes of the circuit samgle to be tested during a scanigng process under constant cagrrent power supply to obtain voltage sacanning change data; the amn‘Teter for the circuit sample to be tested is configured /1 012023 to monitor current changes of the circuit sample to be tested during the scanning process under constant voltage power supply to obtain current scanning change data.
id="p-73"
[0073] Compared with other failure position technologies for integrated circuit, such as optical laser scanning tsechnology can meet the testifig requirements of high positsioning accuracy, high detection efficiency, and low cost. It is a sensitive and efficient way to apply the thermal effect in the interaction between the laser and the semiconductor material to the positioning technology.
The present invention proposes a failure positioning technology utilizing athermal laser to position the resistive failure and grid damage of the transistor in the integrated circuit, and develops test conditions with higher accuracy for positioning the failure points of the integrated circuit in different failure cases, thereby providing technical support for subsequent failure analysis of the integrated circuit.
id="p-74"
[0074] As shown in FIG. 1, the present invention proposes a failure position system and method system includes:
id="p-75"
[0075] a continuous laser with l3lOnm configured to generate an irradiation source with local temperature change, induce local resistance change of the integrated circuit and irradiate and scan semiconductor devices;
id="p-76"
[0076] an optical path adjustment system configured to accurately focus continuous laser of l3lOnm on an active region of the sample to be tested to achieve accurate incidence of the continuous laser of 13 10mm
id="p-77"
[0077] an infrared camera configured to take photos of a surface of the integrated circuit to observe circuit s«wiring, penetrate a silicon sugostrate to perform two-dimenésional imaging of the
id="p-78"
[0078] a programmable mobile platform configured to carry an integrated circuit sample to be tested and perform three-aXis movement along the X, y, and z axes during the laser scanning process in a predetermined manner;
id="p-79"
[0079] a computer control system configured to change parameters of continuous laser with 1310 nm and move positions of a probe station;
id="p-80"
[0080] a power supply system configured to provide voltage or current to the semiconductor devices, where the power supply system includes a DC voltage source and a DC current source;
id="p-81"
[0081] a testing system configured to detect functions of the semiconductor devices and monitor /10/ where the testiifg system includes a voltmetergand an ammeter. /1 012023
id="p-82"
[0082] Further, as shown in FIG. 2, the failure position method specifically includes the following steps.
id="p-83"
[0083] (l) The continuous laser with 1310 nm is turned on and preheated for 10 minutes to ensure continuous lasei with 1310 nm as an irradiatigon source for scanning, so as 8to locally increase the temperature.
id="p-84"
[0084] (2) The programmable mobile platform is customized, the imaging interface of the infrared camera of the testing system on the computer is opened, the failure chip that was pre unpacked on the back is placed in a suitable position on the programmable mobile platform, with the back facing up and fixed, and the power supply circuit is connected to wait for the scanning of the continuous laser with 1310 nm. The programmable mobile platforms are designed for shock absorption to prevent vibration during movement from generating interference signals to the circuit sample to be tested. path adjustment system (the present system adopts an infrared laser with a wavelength of 1.3 pm, which has an extremely high transmittance in silicon, therefore, the active region can be observed directly through the substrate). The focusing objective lens can be selected from 10X, 50X and lOOX objective lenses. According to the size of the circuit sample to be tested, scanning parameters of the continuous laser with 1310 nm and scanning programs of three-aXis of the movable platform are set by the computer control system. The circuit sample to be tested is moved to an initial point for scanning.
id="p-86"
[0086] (4) By means of the power supply system, source table of the power supply system and the test system gre connected to the circuit sample to be tested via a wire, aigd it is determined that the contact is good, thereby realizing the consiant voltage or constant curreni power supply for the integrated circuit to be tested. After power is normally supplied, the sample may be irradiated with the laser, and scanning is started.
id="p-87"
[0087] The scanning process is as follows: the power supply is turned on, and the sample is powered at a rated voltage or 80% of the rated voltage of the circuit sample to be tested. A monitoring interface of the computer is opened. After the monitored current/voltage stabilizes, the circuit sample to be tested is scanned. The current/voltage changes of the sample are monitored.
The computer system can convert a curve of a current as a function of time into a distribution plane as a function of two-dimensional coordinates by using pre-set software, and present same in a
id="p-88"
[0088] Irradiatfon with the laser during scaflning can result in small changes in the current or /1 012023 voltage of the circuit sample to be tested. If the constant voltage power supply is adopted, the current change of the sample is monitored by using the test system. If the constant current power supply 18 adopted, the voltage change of the sample 18 monitored by using the test system The /0210/2023 current or voltage data are recorded by the cozsnputer control system.
id="p-89"
[0089] (5) By using the infrared camera imaging system the surface of the circuit sample to be tested 18 photographed and the layout of the sample 18 recorded. The current or voltage data of the scanning test are compared with the photos photographed by the infrared camera, so as to obtain the distribution diagram with a tiny change amount of the current or voltage.
id="p-90"
[0090] After a single scan is completed, the current distribution diagram and the circuit layout diagram photographed by the infrared camera are overlapped by the computer software to determine an abnormal position of the current change. To confirm the circuit layout of the abnormal area, a 50X or lOOX objective lens can be replaced to take local photos of the abnormal area. [2023 /223
id="p-91"
[0091] After a$ingle scanning is completed; the scanning manner can be::changed, other power supply voltages are set, or a constant current source is used to supply power for retesting. The results of multiple tests are compared to eliminate errors introduced during testing. If there is a non-failure sample with the same type and the same batch, the same test can be performed on it, and abnormal positions are found by comparing with the test result of the failure sample. If there is no suitable non-failure sample for comparison, then the abnormal change points of the current or voltage in the scanning result are focused on.
id="p-92"
[0092] (7) After the tests are completed, the power supply and the laser are turned off, the test bench is arranged, and the test data are processed.
id="p-93"
[0093] In this gxample, a failure position experiment was performed on a fiailure microcontroller /20 sample. FIG 3 SSHOWS the curve of the current gbtained in the scanning procass versus time and the positions of the failure points of the sample to be tested.
id="p-94"
[0094] The present invention can be used to position the failure points or failure cells in the integrated circuit having high resistance characteristics and low resistance characteristics. The tiny change of the current or voltage in the laser scanning process is captured by means of the thermal effect of interaction between the laser and the semiconductor material, to determine the specific failure point causing the failure of the integrated circuit. A current change at the nA level and a voltage change at the uM level can be captured, and the positioning accuracy can reach 0.1 um.
The present invention solves the problem of positioning the failure point of resistive failure in the /1 012023 /2023 ’l 0/2023 /1 012023
id="p-95"
[0095] The embodiments described above are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention various modifications and improvements made by those protection determined by the claims of the present invention /2023 /1 012023 /1 012023 /1 012023 /2023 /1012023 /2023 WHAT IS CLAIlVIED IS: l. A method for integrated circuit failure positioning based on a continuous laser source, comprising: irradiating with an infrared laser a circuit sample to be detected to acquire scanning data of the circuit sample to be detected; photographing with an infrared camera of the circuit sample to be detected to acquire a circuit layout diagram; and comparing the scanning data with the circuit layout diagram to obtain a failure positioning point; wherein,before the irradiating with an infrared laser a circuit sample to be detected, the method further comprises: pre-heating the infrared laser, fiXing the circuit sample to be detected on a programmable mobile platform, and powering the programmable mobile platform; acquiring the scanning data of the circuit sample to be detected comprises: focusing laser of the infrared laser on an active region of the circuit sample to be detected by an optical path adjustment system; setting scanning parameters of the infrared laser and scanning programs of the programmable mobile platform; and adjusting a power supply system for constant voltage power supply, then irradiating the circuit sample to be detected with the laser to obtain current scanning change data.
. The method for integrated circuit failure positioning based on continuous laser source according to claim 1, wherein before obtaining the failure position point, the method further comprises: obtaining a current change distribution map based on the current scanning change data and the circuit layout diagram; and obtaining the failure position point based on abnormal change points of the current change distribution map.
Claims (8)
1.l. A method for integrated circuit failure positioning based on a continuous laser source, comprising: irradiating with an infrared laser a circuit sample to be detected to acquire scanning data of the circuit sample to be detected; photographing with an infrared camera of the circuit sample to be detected to acquire a circuit layout diagram; and comparing the scanning data with the circuit layout diagram to obtain a failure positioning point; wherein,before the irradiating with an infrared laser a circuit sample to be detected, the method further comprises: pre-heating the infrared laser, fiXing the circuit sample to be detected on a programmable mobile platform, and powering the programmable mobile platform; acquiring the scanning data of the circuit sample to be detected comprises: focusing laser of the infrared laser on an active region of the circuit sample to be detected by an optical path adjustment system; setting scanning parameters of the infrared laser and scanning programs of the programmable mobile platform; and adjusting a power supply system for constant voltage power supply, then irradiating the circuit sample to be detected with the laser to obtain current scanning change data.
2. The method for integrated circuit failure positioning based on continuous laser source according to claim 1, wherein before obtaining the failure position point, the method further comprises: obtaining a current change distribution map based on the current scanning change data and the circuit layout diagram; and obtaining the failure position point based on abnormal change points of the current change distribution map.
3. The method for integrated circuit failure positioning based on continuous laser source according to claim 1, wherein acquiring the scanning data of the circuit sample to be detected comprises: focusing laser of the infrared laser on an active region of the circuit sample to be detected by an optical path adjustment system; setting scanning parameters of the infrared laser and scanning programs of the programmable mobile platform; and adjusting a power supply system for constant current power supply, then irradiating the circuit sample to be detected with the laser to obtain voltage scanning change data.
4. The method for integrated circuit failure positioning based on continuous laser source according to claim 3, wherein before obtaining the failure position point, the method further comprises: obtaining a voltage change distribution map based on the voltage scanning change data and the circuit layout diagram; and obtaining the failure position point based on abnormal change points of the voltage change distribution map.
5. Asystem for integrated circuit failure positioning based on continuous laser source, comprising: an infrared laser configured to scan a circuit sample to be detected to obtain scanning data; an infrared camera configured to take photos of the circuit sample to be detected to obtain a circuit layout diagram; a power supply system configured to provide power to the failure position system; a testing system configured to monitor changes in the circuit sample to be detected during a process of scanning.
6. The system for integrated circuit failure positioning based on continuous laser source according to claim 5, wherein the failure position system further comprises: an optical path adjustment system configured to focus laser of the infrared laser on an active region of the circuit sample to be detected to achieve accurate incidence of the laser; a programmable mobile platform configured to carry an integrated circuit sample to be detected and perform three-aXis movement in a predetermined manner; and a computer control system configured to set scanning parameters of the infrared laser and scanning programs of the programmable mobile platform to change parameters of the infrared laser and move positions of the programmable mobile platform.
7. The system for integrated circuit failure positioning based on continuous laser source according to claim 5, wherein the power supply system comprises a Direct Current (DC) voltage source and a DC current source, wherein the DC voltage source is configured to provide a constant voltage, and the DC current source is configured to provide a constant current.
8. The system for integrated circuit failure positioning based on continuous laser source according to claim 5, wherein the testing system comprises a voltmeter and an ammeter, wherein the voltmeter is configured to monitor voltage changes of the circuit sample to be detected during a process of scanning under constant current power supply to obtain voltage scanning change data; the ammeter is configured to monitor current changes of the circuit sample to be detected during the process of scanning under constant voltage power supply to obtain current scanning change data. DRAWINGS MNONB 2N0 MNONE END _‘ .OE 829m 65:8 # 859:8 8 :o_§m 2 EOE Om Swim . , H898: Iv 2&8 526a MNONB ENG mNONB END :8 88:98 88:8 gm _ ”88:8 : b ”888:8 M88 :8 880:8
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111576967.0A CN114324390A (en) | 2021-12-22 | 2021-12-22 | Integrated circuit failure positioning system and method based on continuous laser source |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IE20220219A1 IE20220219A1 (en) | 2023-11-08 |
| IE87492B1 true IE87492B1 (en) | 2024-03-27 |
Family
ID=81054827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IE20220219A IE87492B1 (en) | 2021-12-22 | 2022-12-20 | Failure position system and method for integrated circuit based on continuous laser source |
Country Status (3)
| Country | Link |
|---|---|
| CN (1) | CN114324390A (en) |
| IE (1) | IE87492B1 (en) |
| WO (1) | WO2023116688A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114324390A (en) * | 2021-12-22 | 2022-04-12 | 中国科学院国家空间科学中心 | Integrated circuit failure positioning system and method based on continuous laser source |
| CN117129788B (en) * | 2023-10-13 | 2024-09-24 | 康希通信科技（上海）有限公司 | Capacitor failure detection method |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5430305A (en) * | 1994-04-08 | 1995-07-04 | The United States Of America As Represented By The United States Department Of Energy | Light-induced voltage alteration for integrated circuit analysis |
| US6078183A (en) * | 1998-03-03 | 2000-06-20 | Sandia Corporation | Thermally-induced voltage alteration for integrated circuit analysis |
| US6617862B1 (en) * | 2002-02-27 | 2003-09-09 | Advanced Micro Devices, Inc. | Laser intrusive technique for locating specific integrated circuit current paths |
| CN100499111C (en) * | 2006-08-10 | 2009-06-10 | 中芯国际集成电路制造(上海)有限公司 | Testing structure for MOS capacitor and location method for failure point |
| CN101576565B (en) * | 2008-05-09 | 2013-07-10 | 上海华碧检测技术有限公司 | Location test system for defects of integrated circuit |
| CN105717170A (en) * | 2016-02-18 | 2016-06-29 | 工业和信息化部电子第五研究所 | Laser-induced impedance change test method and system |
| CN108922861B (en) * | 2018-05-14 | 2021-01-05 | 北京智芯微电子科技有限公司 | Integrated circuit repairing device and method based on infrared imaging positioning method |
| CN108802064A (en) * | 2018-07-16 | 2018-11-13 | 安徽世林照明股份有限公司 | A kind of LED lamp IC design debugging circuit board system and adjustment method |
| CN109613016A (en) * | 2018-12-04 | 2019-04-12 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | A kind of semiconductor chip defect detection equipment and method |
| CN111638237A (en) * | 2020-05-07 | 2020-09-08 | 华东师范大学 | Characterization method of failure micro-area of nanoscale electrostatic protection device |
| CN112305408A (en) * | 2020-10-23 | 2021-02-02 | Tcl华星光电技术有限公司 | Light-emitting chip patch detection system and detection method thereof |
| CN113466650B (en) * | 2021-07-06 | 2022-03-18 | 中国科学院国家空间科学中心 | Positioning device and method for detecting hard defect fault point of semiconductor device |
| CN114324390A (en) * | 2021-12-22 | 2022-04-12 | 中国科学院国家空间科学中心 | Integrated circuit failure positioning system and method based on continuous laser source |
-
2021
- 2021-12-22 CN CN202111576967.0A patent/CN114324390A/en active Pending
-
2022
- 2022-12-20 IE IE20220219A patent/IE87492B1/en unknown
- 2022-12-20 WO PCT/CN2022/140337 patent/WO2023116688A1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| IE20220219A1 (en) | 2023-11-08 |
| CN114324390A (en) | 2022-04-12 |
| WO2023116688A1 (en) | 2023-06-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| IE87492B1 (en) | Failure position system and method for integrated circuit based on continuous laser source | |
| IL280067B2 (en) | Sem image enhancement methods and systems | |
| IL292290A (en) | Systems and methods for voltage contrast defect detection | |
| JPH09326425A (en) | Method of defect inspection and its apparatus | |
| IL294468A (en) | Advanced in-line part average testing | |
| IL285501B1 (en) | Sensitive particle detection with spatially-varying polarization rotator and polarizer | |
| JP2007127499A (en) | Nondestructive inspection apparatus and method | |
| IL284459B1 (en) | System and method for inspection using tensor decomposition and singular value decomposition | |
| IL293250A (en) | System and method for defining flexible regions on a sample during inspection | |
| IL305051A (en) | System and method for z-pat defect-guided statistical outlier detection of semiconductor reliability failures | |
| IL298051A (en) | Object holder, electrostatic sheet and method for making an electrostatic sheet | |
| IL297344A (en) | Image enhancement for multi-layered structure in charged-particle beam inspection | |
| IL305052A (en) | Systems and methods for semiconductor adaptive testing using inline defect part average testing | |
| JP2010181288A (en) | Analyzer and analysis method of semiconductor integrated circuit | |
| IL298548A (en) | Design-to-wafer image correlation by combining information from multiple collection channels | |
| CN111766418B (en) | MEMS probe card | |
| JP3813336B2 (en) | Integrated circuit failure location identification method and failure location identification device | |
| IL268436B2 (en) | Multi-column spacing for photomask and reticle inspection and wafer print check verification | |
| IL294865A (en) | System and method for semiconductor device print check alignment | |
| KR101682520B1 (en) | Inspection apparatus and method | |
| IL295385A (en) | Tool for testing an electron-optical assembly | |
| JPH09318330A (en) | Method and instrument for inspection of fine pattern | |
| IL295627A (en) | Inspection apparatus | |
| TW200925585A (en) | Automatic defect inspection device for substrate laser repair and method thereof | |
| JP3450212B2 (en) | Non-destructive inspection semiconductor device, method of manufacturing the same, non-destructive inspection method and non-destructive inspection device |