HK153895A - High speed computer graphics bus - Google Patents
High speed computer graphics bus Download PDFInfo
- Publication number
- HK153895A HK153895A HK153895A HK153895A HK153895A HK 153895 A HK153895 A HK 153895A HK 153895 A HK153895 A HK 153895A HK 153895 A HK153895 A HK 153895A HK 153895 A HK153895 A HK 153895A
- Authority
- HK
- Hong Kong
- Prior art keywords
- high speed
- component
- display component
- bus
- speed bus
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/12—Frame memory handling
- G09G2360/126—The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Human Computer Interaction (AREA)
- General Engineering & Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Bus Control (AREA)
- Image Processing (AREA)
- Digital Computer Display Output (AREA)
- Image Generation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US73602691A | 1991-07-25 | 1991-07-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| HK153895A true HK153895A (en) | 1995-10-06 |
Family
ID=24958195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| HK153895A HK153895A (en) | 1991-07-25 | 1995-09-28 | High speed computer graphics bus |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5471672A (https=) |
| JP (1) | JPH06214945A (https=) |
| GB (1) | GB2258069B (https=) |
| HK (1) | HK153895A (https=) |
| TW (1) | TW305965B (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6009516A (en) * | 1996-10-21 | 1999-12-28 | Texas Instruments Incorporated | Pipelined microprocessor with efficient self-modifying code detection and handling |
| US6055583A (en) * | 1997-03-27 | 2000-04-25 | Mitsubishi Semiconductor America, Inc. | DMA controller with semaphore communication protocol |
| US6057862A (en) * | 1997-07-01 | 2000-05-02 | Memtrax Llc | Computer system having a common display memory and main memory |
| US6118462A (en) * | 1997-07-01 | 2000-09-12 | Memtrax Llc | Computer system controller having internal memory and external memory control |
| US7096497B2 (en) * | 2001-03-30 | 2006-08-22 | Intel Corporation | File checking using remote signing authority via a network |
| US6809735B1 (en) | 2002-01-08 | 2004-10-26 | Apple Computer, Inc. | Virtualization of graphics resources |
| US7768522B2 (en) | 2002-01-08 | 2010-08-03 | Apple Inc. | Virtualization of graphics resources and thread blocking |
| US7015919B1 (en) * | 2002-01-08 | 2006-03-21 | Apple Computer, Inc. | Virtualization of graphics resources |
| US6809736B1 (en) | 2002-01-08 | 2004-10-26 | Apple Computer, Inc. | Virtualization of graphics resources |
| WO2003088848A2 (en) * | 2002-04-16 | 2003-10-30 | Tyco Healthcare Group Lp | Method and apparatus for anastomosis including an expandable anchor |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4228496A (en) * | 1976-09-07 | 1980-10-14 | Tandem Computers Incorporated | Multiprocessor system |
| US4884197A (en) * | 1985-02-22 | 1989-11-28 | Intergraph Corporation | Method and apparatus for addressing a cache memory |
| US5193159A (en) * | 1986-09-24 | 1993-03-09 | Hitachi, Ltd. | Microprocessor system |
| US4811215A (en) * | 1986-12-12 | 1989-03-07 | Intergraph Corporation | Instruction execution accelerator for a pipelined digital machine with virtual memory |
| US5111423A (en) * | 1988-07-21 | 1992-05-05 | Altera Corporation | Programmable interface for computer system peripheral circuit card |
| US5121487A (en) * | 1989-02-21 | 1992-06-09 | Sun Microsystems, Inc. | High speed bus with virtual memory data transfer capability using virtual address/data lines |
| US5218677A (en) * | 1989-05-30 | 1993-06-08 | International Business Machines Corporation | Computer system high speed link method and means |
| US5079696A (en) * | 1989-09-11 | 1992-01-07 | Sun Microsystems, Inc. | Apparatus for read handshake in high-speed asynchronous bus interface |
| US5136580A (en) * | 1990-05-16 | 1992-08-04 | Microcom Systems, Inc. | Apparatus and method for learning and filtering destination and source addresses in a local area network system |
| US5243702A (en) * | 1990-10-05 | 1993-09-07 | Bull Hn Information Systems Inc. | Minimum contention processor and system bus system |
| EP0494056A3 (en) * | 1990-12-31 | 1994-08-10 | Ibm | Dynamically partitionable and allocable bus structure |
-
1992
- 1992-06-29 GB GB9213742A patent/GB2258069B/en not_active Expired - Fee Related
- 1992-07-23 TW TW081105821A patent/TW305965B/zh active
- 1992-07-27 JP JP4218789A patent/JPH06214945A/ja active Pending
-
1994
- 1994-09-02 US US08/300,368 patent/US5471672A/en not_active Expired - Lifetime
-
1995
- 1995-09-28 HK HK153895A patent/HK153895A/xx not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TW305965B (https=) | 1997-05-21 |
| GB2258069B (en) | 1995-03-29 |
| US5471672A (en) | 1995-11-28 |
| JPH06214945A (ja) | 1994-08-05 |
| GB2258069A (en) | 1993-01-27 |
| GB9213742D0 (en) | 1992-08-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| AU5425896A (en) | Software emulation system with dynamic translation of emulat ed instructions for increased processing speed | |
| CA2070934A1 (en) | Graphics Display System | |
| CA2145844A1 (en) | A System for Operating Application Software in a Safety Critical Environment | |
| CA2218187A1 (en) | Differencing communication system | |
| TW347639B (en) | System and method for processing video data | |
| EP0348672A3 (en) | A data processing system bus architecture | |
| EP0378426A3 (en) | Data transfer using bus address lines | |
| CA2098418A1 (en) | Distributed Applications Processing Network | |
| TW253947B (en) | A data processing system | |
| HK153895A (en) | High speed computer graphics bus | |
| EP0817090A3 (en) | System for multisized bus coupling in a packet-switched computer system | |
| WO2000004484A3 (en) | Wide instruction word graphics processor | |
| CA2050658A1 (en) | Dual hardware channels and hardware context switching in a graphics rendering processor | |
| CA2084574A1 (en) | Synchronization techniques for multimedia data streams | |
| EP0986007A3 (en) | Method of isolating I/O requests | |
| AU6015594A (en) | Interactive computer system with multi-protocol capability | |
| SG81897A1 (en) | Method and apparatus for allowing packet data to be separated over multiple bus targets | |
| CA2116826A1 (en) | Data Processing System Using a Non-Multiplexed, Asynchronous Address/Data Bus System | |
| AU5454494A (en) | Computer system for sharing common system resources with two or more independently operating microcomputers | |
| CA2010634A1 (en) | Digital processing apparatus | |
| WO1994012923A3 (en) | A safety critical processor and processing method for a data processing system | |
| CA2130064A1 (en) | Method and Apparatus for Transferring Data Between a Host Processor and a Subsystem Processor in a Data Processing System | |
| CA2007004A1 (en) | Multiprocessor controller having shared control store | |
| CA2303024A1 (en) | Apparatus and method for protocol application data frame operation requests interfacing with an input/output device | |
| JPS55154851A (en) | Data transmission system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |