HK1075109A1 - A processor and a method of suspending a thread - Google Patents

A processor and a method of suspending a thread

Info

Publication number
HK1075109A1
HK1075109A1 HK05107419A HK05107419A HK1075109A1 HK 1075109 A1 HK1075109 A1 HK 1075109A1 HK 05107419 A HK05107419 A HK 05107419A HK 05107419 A HK05107419 A HK 05107419A HK 1075109 A1 HK1075109 A1 HK 1075109A1
Authority
HK
Hong Kong
Prior art keywords
suspending
thread
processor
Prior art date
Application number
HK05107419A
Other languages
English (en)
Inventor
Deborah Marr
Scott Rodgers
David Hill
Shivnandan Kaushik
James Crossland
David Koufaty
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1075109A1 publication Critical patent/HK1075109A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/3009—Thread control instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
HK05107419A 2001-12-31 2005-08-24 A processor and a method of suspending a thread HK1075109A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/039,777 US20030126416A1 (en) 2001-12-31 2001-12-31 Suspending execution of a thread in a multi-threaded processor
PCT/US2002/039790 WO2003058434A1 (en) 2001-12-31 2002-12-11 Suspending execution of a thread in a multi-threaded

Publications (1)

Publication Number Publication Date
HK1075109A1 true HK1075109A1 (en) 2005-12-02

Family

ID=21907295

Family Applications (1)

Application Number Title Priority Date Filing Date
HK05107419A HK1075109A1 (en) 2001-12-31 2005-08-24 A processor and a method of suspending a thread

Country Status (9)

Country Link
US (1) US20030126416A1 (xx)
JP (1) JP2005514698A (xx)
KR (1) KR100617417B1 (xx)
CN (1) CN1287272C (xx)
AU (1) AU2002364559A1 (xx)
DE (1) DE10297597T5 (xx)
HK (1) HK1075109A1 (xx)
TW (1) TW200403588A (xx)
WO (1) WO2003058434A1 (xx)

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US9274793B2 (en) 2011-03-25 2016-03-01 Soft Machines, Inc. Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines
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Also Published As

Publication number Publication date
KR20040069352A (ko) 2004-08-05
AU2002364559A1 (en) 2003-07-24
US20030126416A1 (en) 2003-07-03
JP2005514698A (ja) 2005-05-19
KR100617417B1 (ko) 2006-08-30
CN1287272C (zh) 2006-11-29
CN1608246A (zh) 2005-04-20
WO2003058434A1 (en) 2003-07-17
DE10297597T5 (de) 2005-01-05
TW200403588A (en) 2004-03-01

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20101211