HK1022359A1 - Computer system having a multi-pointer branch instruction and method - Google Patents

Computer system having a multi-pointer branch instruction and method

Info

Publication number
HK1022359A1
HK1022359A1 HK00101034A HK00101034A HK1022359A1 HK 1022359 A1 HK1022359 A1 HK 1022359A1 HK 00101034 A HK00101034 A HK 00101034A HK 00101034 A HK00101034 A HK 00101034A HK 1022359 A1 HK1022359 A1 HK 1022359A1
Authority
HK
Hong Kong
Prior art keywords
computer system
branch instruction
pointer branch
pointer
instruction
Prior art date
Application number
HK00101034A
Other languages
English (en)
Inventor
Rami Natan
Arie Ben-Ephraim
Arie Kazachin
Alex Miretsky
Vitaly Sukonik
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of HK1022359A1 publication Critical patent/HK1022359A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/447—Target code generation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
HK00101034A 1998-03-27 2000-02-22 Computer system having a multi-pointer branch instruction and method HK1022359A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP98105605A EP0945795B1 (fr) 1998-03-27 1998-03-27 Système d'ordinateur ayant une instruction et méthode de branchement a pointeurs multiples

Publications (1)

Publication Number Publication Date
HK1022359A1 true HK1022359A1 (en) 2000-08-04

Family

ID=8231661

Family Applications (1)

Application Number Title Priority Date Filing Date
HK00101034A HK1022359A1 (en) 1998-03-27 2000-02-22 Computer system having a multi-pointer branch instruction and method

Country Status (4)

Country Link
US (1) US6205546B1 (fr)
EP (1) EP0945795B1 (fr)
DE (1) DE69815656T2 (fr)
HK (1) HK1022359A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6546478B1 (en) 1999-10-14 2003-04-08 Advanced Micro Devices, Inc. Line predictor entry with location pointers and control information for corresponding instructions in a cache line
US6647490B2 (en) * 1999-10-14 2003-11-11 Advanced Micro Devices, Inc. Training line predictor for branch targets
US6636959B1 (en) 1999-10-14 2003-10-21 Advanced Micro Devices, Inc. Predictor miss decoder updating line predictor storing instruction fetch address and alignment information upon instruction decode termination condition
SE0203265D0 (sv) * 2002-11-06 2002-11-06 Coloplus Ab A feed or food product composition
WO2014148935A1 (fr) * 2013-03-18 2014-09-25 Общество С Ограниченной Ответственностью "Протекшен Технолоджи Ресеч" Procédé de modification d'un code machine et de données non modifiables du programme contre les modifications

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4905141A (en) * 1988-10-25 1990-02-27 International Business Machines Corporation Partitioned cache memory with partition look-aside table (PLAT) for early partition assignment identification
JPH06348490A (ja) * 1993-06-08 1994-12-22 Hitachi Ltd 演算処理方法、及びマイクロコンピュータ
JPH08227363A (ja) * 1995-02-21 1996-09-03 Nec Corp 分岐命令処理方法
US6021272A (en) * 1995-10-04 2000-02-01 Platinum Technology, Inc. Transforming and manipulating program object code
JPH09265397A (ja) * 1996-03-29 1997-10-07 Hitachi Ltd Ｖｌｉｗ命令用プロセッサ
US6119222A (en) * 1996-12-23 2000-09-12 Texas Instruments Incorporated Combined branch prediction and cache prefetch in a microprocessor
US6108773A (en) * 1998-03-31 2000-08-22 Ip-First, Llc Apparatus and method for branch target address calculation during instruction decode

Also Published As

Publication number Publication date
DE69815656D1 (de) 2003-07-24
DE69815656T2 (de) 2003-12-18
US6205546B1 (en) 2001-03-20
EP0945795B1 (fr) 2003-06-18
EP0945795A1 (fr) 1999-09-29

Similar Documents

Publication Publication Date Title
SG77228A1 (en) System and method for performing a shuffle instruction
IL135459A0 (en) A system and method for performing computer processing operations
IL135460A0 (en) A system and method for performing computer processing operations
GB9412487D0 (en) A computer system for executing branch instructions
IL130736A0 (en) A system and method for creating executing and maintaining cross-enterprise processes
EP0902935A4 (fr) Systeme et procede d'enseignement assiste par agent
GB2350219B (en) System and method for maintaining branch information
GB2330052B (en) A reference based parametric dimensioning method and system
EP1146813A4 (fr) Systeme et procede de mise en oeuvre d'un schema de traitement
IL127073A0 (en) Software translation system and method
IL120632A0 (en) Multiprocessor system and method
HK1024746A1 (en) Positioning system and method
EP0971061A4 (fr) Systeme et procede de couture
GB9827738D0 (en) Stock control computer system and method
IL130267A (en) Method of and system for installing a computer program
GB2340275B (en) Method and system for providing a virtual wind tunnel
HK1044827B (zh) 計算機處理器檢驗指令的方法和系統及相應計算機系統
GB9725507D0 (en) Method and system for processing multiple register instruction
EP1040879A4 (fr) Procede et systeme de pliage
IL134658A0 (en) Method and system for creating multi-instanced software with a preprocessor
EP0910086A4 (fr) Systeme et procede d'edition
EP0690414A3 (fr) Système et méthode pour dessiner des données de vecteur
HK1022359A1 (en) Computer system having a multi-pointer branch instruction and method
EP1131940A4 (fr) Systeme d'acces aux donnees et procedes correspondants
IL125222A0 (en) A key-agreement system and method

Legal Events

Date Code Title Description
PF Patent in force
AS Change of ownership

Owner name: FREESCALE SEMICONDUCTOR, INC.

Free format text: FORMER OWNER(S): MOTOROLA INC

PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20080327