DE69815656T2 - Rechnersystem mit einem mehrfach Sprungbefehlzeiger und -Verfahren - Google Patents

Rechnersystem mit einem mehrfach Sprungbefehlzeiger und -Verfahren

Info

Publication number
DE69815656T2
DE69815656T2 DE69815656T DE69815656T DE69815656T2 DE 69815656 T2 DE69815656 T2 DE 69815656T2 DE 69815656 T DE69815656 T DE 69815656T DE 69815656 T DE69815656 T DE 69815656T DE 69815656 T2 DE69815656 T2 DE 69815656T2
Authority
DE
Germany
Prior art keywords
procedure
computer system
instruction pointer
jump instruction
multiple jump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69815656T
Other languages
English (en)
Other versions
DE69815656D1 (de
Inventor
Rami Natan
Arie Ben-Ephraim
Arie Kazachin
Alex Miretsky
Vitaly Sukonik
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE69815656D1 publication Critical patent/DE69815656D1/de
Publication of DE69815656T2 publication Critical patent/DE69815656T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/447—Target code generation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69815656T 1998-03-27 1998-03-27 Rechnersystem mit einem mehrfach Sprungbefehlzeiger und -Verfahren Expired - Fee Related DE69815656T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP98105605A EP0945795B1 (de) 1998-03-27 1998-03-27 Rechnersystem mit einem mehrfach Sprungbefehlzeiger und -Verfahren

Publications (2)

Publication Number Publication Date
DE69815656D1 DE69815656D1 (de) 2003-07-24
DE69815656T2 true DE69815656T2 (de) 2003-12-18

Family

ID=8231661

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69815656T Expired - Fee Related DE69815656T2 (de) 1998-03-27 1998-03-27 Rechnersystem mit einem mehrfach Sprungbefehlzeiger und -Verfahren

Country Status (4)

Country Link
US (1) US6205546B1 (de)
EP (1) EP0945795B1 (de)
DE (1) DE69815656T2 (de)
HK (1) HK1022359A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6546478B1 (en) 1999-10-14 2003-04-08 Advanced Micro Devices, Inc. Line predictor entry with location pointers and control information for corresponding instructions in a cache line
US6636959B1 (en) 1999-10-14 2003-10-21 Advanced Micro Devices, Inc. Predictor miss decoder updating line predictor storing instruction fetch address and alignment information upon instruction decode termination condition
US6647490B2 (en) * 1999-10-14 2003-11-11 Advanced Micro Devices, Inc. Training line predictor for branch targets
SE0203265D0 (sv) * 2002-11-06 2002-11-06 Coloplus Ab A feed or food product composition
US20140283116A1 (en) * 2013-03-18 2014-09-18 Protection Technologies Research, Llc Method for protected execution of code and protection of executable code and data against modifications

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4905141A (en) * 1988-10-25 1990-02-27 International Business Machines Corporation Partitioned cache memory with partition look-aside table (PLAT) for early partition assignment identification
JPH06348490A (ja) * 1993-06-08 1994-12-22 Hitachi Ltd 演算処理方法、及びマイクロコンピュータ
JPH08227363A (ja) * 1995-02-21 1996-09-03 Nec Corp 分岐命令処理方法
US6021272A (en) * 1995-10-04 2000-02-01 Platinum Technology, Inc. Transforming and manipulating program object code
JPH09265397A (ja) * 1996-03-29 1997-10-07 Hitachi Ltd Ｖｌｉｗ命令用プロセッサ
US6119222A (en) * 1996-12-23 2000-09-12 Texas Instruments Incorporated Combined branch prediction and cache prefetch in a microprocessor
US6108773A (en) * 1998-03-31 2000-08-22 Ip-First, Llc Apparatus and method for branch target address calculation during instruction decode

Also Published As

Publication number Publication date
HK1022359A1 (en) 2000-08-04
US6205546B1 (en) 2001-03-20
DE69815656D1 (de) 2003-07-24
EP0945795A1 (de) 1999-09-29
EP0945795B1 (de) 2003-06-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US

8339 Ceased/non-payment of the annual fee