HK1011228A1 - A system and method for increasing functionality on the peripheral component interconnect bus - Google Patents

A system and method for increasing functionality on the peripheral component interconnect bus

Info

Publication number
HK1011228A1
HK1011228A1 HK98112384A HK98112384A HK1011228A1 HK 1011228 A1 HK1011228 A1 HK 1011228A1 HK 98112384 A HK98112384 A HK 98112384A HK 98112384 A HK98112384 A HK 98112384A HK 1011228 A1 HK1011228 A1 HK 1011228A1
Authority
HK
Hong Kong
Prior art keywords
peripheral component
component interconnect
interconnect bus
increasing functionality
functionality
Prior art date
Application number
HK98112384A
Other languages
English (en)
Inventor
Ravi Nagaraj
Aniruddha Kundu
James Akiyama
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1011228A1 publication Critical patent/HK1011228A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
HK98112384A 1995-09-26 1998-11-27 A system and method for increasing functionality on the peripheral component interconnect bus HK1011228A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/534,187 US5805842A (en) 1995-09-26 1995-09-26 Apparatus, system and method for supporting DMA transfers on a multiplexed bus
PCT/US1996/014939 WO1997014100A1 (en) 1995-09-26 1996-09-18 A system and method for increasing functionality on the peripheral component interconnect bus

Publications (1)

Publication Number Publication Date
HK1011228A1 true HK1011228A1 (en) 1999-07-09

Family

ID=24129034

Family Applications (1)

Application Number Title Priority Date Filing Date
HK98112384A HK1011228A1 (en) 1995-09-26 1998-11-27 A system and method for increasing functionality on the peripheral component interconnect bus

Country Status (8)

Country Link
US (1) US5805842A (ko)
KR (1) KR100271336B1 (ko)
AU (1) AU7112596A (ko)
BR (1) BR9610950A (ko)
DE (1) DE19681574T1 (ko)
GB (1) GB2319642B (ko)
HK (1) HK1011228A1 (ko)
WO (1) WO1997014100A1 (ko)

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Also Published As

Publication number Publication date
KR100271336B1 (ko) 2000-11-01
KR19990063741A (ko) 1999-07-26
GB2319642B (en) 2000-09-13
US5805842A (en) 1998-09-08
GB2319642A (en) 1998-05-27
BR9610950A (pt) 1999-01-12
AU7112596A (en) 1997-04-30
WO1997014100A1 (en) 1997-04-17
DE19681574T1 (de) 1998-10-01
GB9803706D0 (en) 1998-04-15

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