GB993251A - Improvements in and relating to methods of manufacturing semiconductor devices - Google Patents

Improvements in and relating to methods of manufacturing semiconductor devices

Info

Publication number
GB993251A
GB993251A GB122362A GB122362A GB993251A GB 993251 A GB993251 A GB 993251A GB 122362 A GB122362 A GB 122362A GB 122362 A GB122362 A GB 122362A GB 993251 A GB993251 A GB 993251A
Authority
GB
United Kingdom
Prior art keywords
wafer
germanium
diffusion
projection
bismuth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB122362A
Inventor
Julian Robert Anthony Beale
Andrew Francis Beer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to NL287617D priority Critical patent/NL287617A/xx
Priority to BE627004D priority patent/BE627004A/xx
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB122362A priority patent/GB993251A/en
Priority to CH26763A priority patent/CH441241A/en
Priority to FR921026A priority patent/FR1343354A/en
Priority to ES284071A priority patent/ES284071A1/en
Priority to SE32563A priority patent/SE302014B/xx
Priority to DK13263A priority patent/DK119933B/en
Priority to DEN22597A priority patent/DE1221362B/en
Publication of GB993251A publication Critical patent/GB993251A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/04—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the liquid state
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/228—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Die Bonding (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

993,251. Semi-conductor devices. MULLARD Ltd. Jan. 12, 1962, No. 1223/62. Heading H1K. The thickness of a diffused impurity layer in a semi-conductor body is made small by alloying the semi-conductor body at the same time as diffusion takes place, the rate at which the liquid-solid interface of alloying advances into the body being greater than the diffusion rate of the impurity so that the impurity is swept into the body just ahead of and at the same rate as the liquid-solid interface, the manner of cooling the body determining the interval between furthest advance of the interface and cessation of diffusion of impurity and thereby determining the final width of the diffused zone. The method is applied to the construction of a transistor the base width of which is <SP>5</SP>/ 8 th Á, the base resistance being 20 ohms, and which can be employed up to 1,000 mc/s. The method is also said to be of use in the construction of four-layer devices. To produce twenty transistors from a 3 ohm/cm. germanium wafer of P-type, an apertured carbon jig is used to position twenty bismuth pellets with 0À5% arsenic to improve wetting and these are heated to 600‹ C. in hydrogen for 3 minutes to become alloyed lightly to the germanium wafer. The top of each bismuth projection is then cut off and the remainder of the projection is divided diametrically into two parts by means of a thin blade which is made to penetrate the wafer. The division is further extended into the wafer by sandblasting. The projections are then encapsulated in a paste made of alumina polishing powder heated for one hour at 1,000‹ C. and made into a paste with a liquid comprising 9 volumes of acetone to one of silicone oil. The wafer with the paste covering the projections is now heated in hydrogen at 660‹ C. for ten minutes together with a silica boat containing powdered tin having arsenic and antimony each in the proportion of 15% by weight. During this treatment the paste hardens and provides a shell within which each division of the bismuth projections may melt without spreading. The cement is sufficiently porous to permit the diffusion of arsenic and antimony. into the melt from outside and these impurities diffuse from the melt into the germanium wafer. On cooling down, each projection is in the condition shown in Fig. 2. The bismuth projections 8 and 9, separated by the cut 4 and encased in cement 10, recrystallize as N-type material together with layers 6 and 7 of the germanium wafer into which the bismuth melts have penetrated. A layer 5, beneath the recrystallized zones, and elsewhere over the solid germanium surface, is converted to N-type by diffusion. From this point the cement mould is removed and one of each of the pairs of projections is painted with aluminium in a volatizable varnish before a second coating of alumina paste is applied. The wafer is now placed in a furnace wound with one coil to give a region of 700‹ C. and overwound at one portion to give a region of 800‹ C. The wafer is first heated at about 10‹ C/minute to 750‹ C. at which point it may be held for a period to ensure that the painted projection achieves a uniform melt of aluminium, bismuth, arsenic, and germanium. A pause to ensure a uniform mixture is not essential. During this period the distance between the liquid-solid interface and the front of diffusion into the solid germanium increases and since this distance is that of the base width of the final transistor and is required as amall as possible this part of the process is preferably kept as short as possible. As soon as a good mix is ensured the temperature of the wafer is increased by 50‹ C. in 30 seconds so that the liquid-solid interface accelerates into the germanium and sweeps up the diffusion front which maintains a small minimum spacing ahead of it. From this point the wafer is cooled rapidly from 800‹ C. to 700‹ C. in order to maintain the minimum spacing as much as possible considering that the diffusion front will continue to advance for a while after the solidliquid interface has slowed down and halted. Cooling is slowed down below 700‹ C. to prevent cracking. By controlling the rate of the initial period of rapid cooling the thickness of the diffused zone is determined at will. The diffusion of aluminium into the germanium wafer is slight and although some will diffuse underneath the bottom of the cut 4 it does so in insignificant quantity and will in any event react with the arsenic impurity there present. After removal of the second cement mould the devices appear as shown in Fig. 4, the left-hand projection 11 being a P-doped zone of bismuth, arsenic, antimony, germanium, and aluminium, standing on a P-doped zone 13 of mainly germanium and aluminium. The diffused layer 5 beneath zone 13 is of N-type and has a thickness of about <SP>5</SP>/ 8 th microns. The right-hand projection 12 and underlying layer 14 is of N-type material as it lacks the aluminium added to its companion projection. Projection 12 is therefore, utilized as an ohmic connection to the base region defined by diffused zone 15 while projection 11 constitutes the emitter. To the far side of the germanium wafer indium pellets are alloyed at 500‹ C. to provide ohmic collector connections opposite the projections 11. The twenty individual devices are now separated by sawing apart or by scoring the wafer and breaking it. Nickel electrodes are now attached, the collector electrode being attached directly to the indium at 180‹ C. and the emitter and base electrodes being soldered on by means of a lead-tin eutectic. It is finally necessary to reduce the area of the base zone by etching in sodium hydroxide or potassium hydroxide while a current is passed through the emitter. By this means germanium is removed from under each projection 11 and 12 as shown by the dotted lines 28 and 29 leaving the projections mounted on a central stalk. During etching the cut 4 is protected by a resist lacquer. Before encapsulation the device is washed and dried. Instead of using bismuth as a carrier metal lead or tin may be employed. Instead of dividing the projections to obtain an ohmic base connection with one half a separate base connection may be made. If silicon is used as the wafer material the carrier metal preferably employed is tin with the addition of boron and/or phosphorus, arsenic being diffused into the melts one of which, destined to become the base connection, has the addition of aluminium. With both germanium and silicon wafers the material to be diffused may be provided by diffusion into the wafer before alloying the carrier metal.
GB122362A 1962-01-12 1962-01-12 Improvements in and relating to methods of manufacturing semiconductor devices Expired GB993251A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
NL287617D NL287617A (en) 1962-01-12
BE627004D BE627004A (en) 1962-01-12
GB122362A GB993251A (en) 1962-01-12 1962-01-12 Improvements in and relating to methods of manufacturing semiconductor devices
CH26763A CH441241A (en) 1962-01-12 1963-01-10 A method of manufacturing a semiconductor device and a semiconductor device manufactured by this method
FR921026A FR1343354A (en) 1962-01-12 1963-01-10 Semiconductor device and its manufacturing process
ES284071A ES284071A1 (en) 1962-01-12 1963-01-11 A method of manufacturing a semiconductor device (Machine-translation by Google Translate, not legally binding)
SE32563A SE302014B (en) 1962-01-12 1963-01-11
DK13263A DK119933B (en) 1962-01-12 1963-01-11 Method for manufacturing semiconductor components.
DEN22597A DE1221362B (en) 1962-01-12 1963-01-12 Method for manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB122362A GB993251A (en) 1962-01-12 1962-01-12 Improvements in and relating to methods of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
GB993251A true GB993251A (en) 1965-05-26

Family

ID=9718260

Family Applications (1)

Application Number Title Priority Date Filing Date
GB122362A Expired GB993251A (en) 1962-01-12 1962-01-12 Improvements in and relating to methods of manufacturing semiconductor devices

Country Status (8)

Country Link
BE (1) BE627004A (en)
CH (1) CH441241A (en)
DE (1) DE1221362B (en)
DK (1) DK119933B (en)
ES (1) ES284071A1 (en)
GB (1) GB993251A (en)
NL (1) NL287617A (en)
SE (1) SE302014B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117259949B (en) * 2023-11-17 2024-02-06 中国航发沈阳黎明航空发动机有限责任公司 Nickel-based superalloy low-temperature transient liquid phase diffusion connection method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1040697B (en) * 1955-03-30 1958-10-09 Siemens Ag Method for doping semiconductor bodies
NL199100A (en) * 1955-07-21
GB807995A (en) * 1955-09-02 1959-01-28 Gen Electric Co Ltd Improvements in or relating to the production of semiconductor bodies
AT204604B (en) * 1956-08-10 1959-08-10 Philips Nv Process for producing a semiconducting storage layer system and a semiconducting barrier layer system
BE574814A (en) * 1958-01-16
NL111773C (en) * 1958-08-07

Also Published As

Publication number Publication date
SE302014B (en) 1968-07-01
NL287617A (en)
ES284071A1 (en) 1963-05-16
DK119933B (en) 1971-03-15
DE1221362B (en) 1966-07-21
BE627004A (en)
CH441241A (en) 1967-08-15

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