GB9930783D0 - Semiconductor package and method of fabricating the same - Google Patents

Semiconductor package and method of fabricating the same

Info

Publication number
GB9930783D0
GB9930783D0 GB9930783A GB9930783A GB9930783D0 GB 9930783 D0 GB9930783 D0 GB 9930783D0 GB 9930783 A GB9930783 A GB 9930783A GB 9930783 A GB9930783 A GB 9930783A GB 9930783 D0 GB9930783 D0 GB 9930783D0
Authority
GB
United Kingdom
Prior art keywords
fabricating
same
semiconductor package
package
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9930783A
Other versions
GB2345383B (en
GB2345383A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9930783D0 publication Critical patent/GB9930783D0/en
Publication of GB2345383A publication Critical patent/GB2345383A/en
Application granted granted Critical
Publication of GB2345383B publication Critical patent/GB2345383B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
GB9930783A 1998-12-29 1999-12-29 Semiconductor package and method of fabricating the same Expired - Fee Related GB2345383B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980059972A KR100315030B1 (en) 1998-12-29 1998-12-29 Manufacturing method of semiconductor package

Publications (3)

Publication Number Publication Date
GB9930783D0 true GB9930783D0 (en) 2000-02-16
GB2345383A GB2345383A (en) 2000-07-05
GB2345383B GB2345383B (en) 2003-09-10

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Country Status (6)

Country Link
US (1) US20020089043A1 (en)
JP (1) JP2000195987A (en)
KR (1) KR100315030B1 (en)
CN (1) CN1175488C (en)
GB (1) GB2345383B (en)
TW (1) TW442932B (en)

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US6862189B2 (en) * 2000-09-26 2005-03-01 Kabushiki Kaisha Toshiba Electronic component, circuit device, method for manufacturing the circuit device, and semiconductor device
DE10120408B4 (en) 2001-04-25 2006-02-02 Infineon Technologies Ag Electronic component with a semiconductor chip, electronic assembly of stacked semiconductor chips and method for their production
KR100830347B1 (en) * 2001-09-11 2008-05-20 페어차일드코리아반도체 주식회사 Direct chip attaching package, manufacturing method thereof and stacked direct chip attaching package
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TWI232560B (en) 2002-04-23 2005-05-11 Sanyo Electric Co Semiconductor device and its manufacture
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JP4215571B2 (en) * 2002-06-18 2009-01-28 三洋電機株式会社 Manufacturing method of semiconductor device
TWI229435B (en) 2002-06-18 2005-03-11 Sanyo Electric Co Manufacture of semiconductor device
TWI227550B (en) 2002-10-30 2005-02-01 Sanyo Electric Co Semiconductor device manufacturing method
SG119185A1 (en) * 2003-05-06 2006-02-28 Micron Technology Inc Method for packaging circuits and packaged circuits
TWI225696B (en) * 2003-06-10 2004-12-21 Advanced Semiconductor Eng Semiconductor package and method for manufacturing the same
JP4401181B2 (en) 2003-08-06 2010-01-20 三洋電機株式会社 Semiconductor device and manufacturing method thereof
DE10351028B4 (en) * 2003-10-31 2005-09-08 Infineon Technologies Ag Semiconductor component and suitable manufacturing / assembly process
KR101001634B1 (en) * 2003-12-19 2010-12-17 주식회사 하이닉스반도체 semiconductor package and method for forming the same
KR101122492B1 (en) * 2004-11-16 2012-02-29 강준모 Semiconductor device having solder bump and method of manufacturing the same
TWI324800B (en) 2005-12-28 2010-05-11 Sanyo Electric Co Method for manufacturing semiconductor device
KR100871707B1 (en) * 2007-03-30 2008-12-05 삼성전자주식회사 Wafer level package preventing a chipping defect and manufacturing method thereof
TWI351751B (en) * 2007-06-22 2011-11-01 Ind Tech Res Inst Self-aligned wafer or chip structure, self-aligned
CN101836289B (en) * 2007-10-22 2012-07-18 日本电气株式会社 Semiconductor device
KR100988403B1 (en) * 2008-04-29 2010-10-18 주식회사 네패스 Semiconductor package and wafer level fabrication method therefor
US9024431B2 (en) * 2009-10-29 2015-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor die contact structure and method
US8796137B2 (en) * 2010-06-24 2014-08-05 Stats Chippac, Ltd. Semiconductor device and method of forming RDL along sloped side surface of semiconductor die for z-direction interconnect
JP5200130B2 (en) * 2011-03-22 2013-05-15 セイコーインスツル株式会社 Manufacturing method of wafer level CSP
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EP3499552A1 (en) * 2017-12-14 2019-06-19 Nexperia B.V. Semiconductor device and method of manufacture
CN110010496B (en) * 2018-12-26 2023-04-28 浙江集迈科微电子有限公司 Manufacturing method of system-in-package interconnection structure with high-density side wall bonding pads

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Also Published As

Publication number Publication date
KR100315030B1 (en) 2002-04-24
TW442932B (en) 2001-06-23
GB2345383B (en) 2003-09-10
KR20000043574A (en) 2000-07-15
GB2345383A (en) 2000-07-05
JP2000195987A (en) 2000-07-14
CN1175488C (en) 2004-11-10
US20020089043A1 (en) 2002-07-11
CN1260591A (en) 2000-07-19

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