GB985094A - Improvements in or relating to hermetic sealing of electrical components - Google Patents

Abstract

985,094. Semi-conductor devices; circuit assemblies. SIEMENS & HALSKE A.G. March 24, 1961 [March 25, 1960], No. 10882/61. Headings H1K and H1R. In an electrical device including a crystalline carrier body with at least part of at least one active component formed thereon by modification of the chemical constitution of part(s) of the body and/or by addition of a component element or elements to the body, the totality of said modified part(s) and/or element(s) is hermetically sealed by the unmodified part of the body in conjunction with a sealing means applied across the exposed surfaces of said totality, said sealing means comprising at least one conductive element which interconnects part of said active component with a passive component formed on the body. The crystalline body may consist of an alkali earth titanate, e.g., a ferro-electric ceramic such as barium titanate, or a highly resistive semi-conductor material such as germanium or silicon. As shown, Fig. 1, a depression is etched in a carrier body 20 of semi-conductor crystalline material of one conductivity type so that a protrusion 21 is left therein. By diffusion and/or alloying, a base region 22 and an emitter region 35 are formed in the protrusion 21 so that a junction transistor is formed of which the carrier 20 forms the collector region. Ohmic base and emitter electrodes 23, 26 are secured to their respective regions and the depression is filled with a resin or wax 25; surface portions of electrodes 23, 26 are, however, left uncovered and are subsequently connected by a metal film 27 to parts of the carrier 28, 29 which are doped to constitute resistors. In Fig. 2, the carrier 20 constitutes the base region, and emitter and collector regions are formed by alloying electrodes 39, 30 to the body within recesses 31, 32 respectively, the recesses being subsequently sealed by metal plates 33, 34, which also provide connections between electrodes 39, 30 and doped parts of the carrier forming resistors or capacitors. Diodes may be similarly sealed. Alternatively, the carrier 20 may be of intrinsic conductivity, only those parts forming portions of circuit elements being doped. Fig. 5 shows a multivibrator circuit (not itself within the scope of the invention claimed), comprising two transistors formed in a high-resistivity semi-conductor body 1, e.g. of N-type germanium or silicon, which forms the collector 6 of the first transistor and the base 7 of the second transistor. P-type base region 2 of the first transistor and collector 3 and emitter 4 of the second transistor are produced by diffusion, then N-type emitter region 5 of the first transistor is similarly formed. During diffusion, parts of the carrier not to be doped are masked, as by an oxide coating; alloying or vapour deposition may replace diffusion. The remaining circuit components Rl, R2, C, and biasing potentials are connected to the transistors by wires. In Fig. 7, the remaining circuit components are formed integral with the carrier body, resistors R1, R2 being formed by P-doped regions 11, 10 respectively, and the capacitor C being formed by a reversed-bias junction between P-type region 3 and an N-type region 9 produced thereon. Connections 12, 13 are made by thin wires of, e.g., gold, copper, aluminium, platinum. Wire connectors are avoided in the device of Fig. 8 in which a P-type zone 19 passing round the edge of carrier 14 forms R1 and its connections to the transistors. Similarly, an N-type strip A joins " capacitor " region 9 to resistive P-type region 15, any resistance at junction J being reduced by depositing conductive material across it and any injection effect being eliminated by positioning of the components parts or by etching. To avoid A's short-circuiting the path through the carrier between the collector of the first transistor and the base of the second, a further resistive region 16 is formed between the second transistor and the " capacitor "; alternatively, the length of A may be increased or its width reduced; or the carrier 14 may be intrinsic, an N-type region being formed within the limits shown by the broken line in Fig. 8; or an insulating layer may be formed where areas 9 and A are shown in Fig. 8, as by oxidation, after which a capacitor plate and contact to region 15 are vapour deposited thereon. In a modification the emitter and collector of the second transistor are on opposite sides of the carrier to those shown.