GB9811203D0 - 3-step etching for contact window - Google Patents
3-step etching for contact windowInfo
- Publication number
- GB9811203D0 GB9811203D0 GBGB9811203.0A GB9811203A GB9811203D0 GB 9811203 D0 GB9811203 D0 GB 9811203D0 GB 9811203 A GB9811203 A GB 9811203A GB 9811203 D0 GB9811203 D0 GB 9811203D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- contact window
- step etching
- etching
- window
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002238128A CA2238128A1 (en) | 1998-05-20 | 1998-05-20 | 3-step etching for contact window |
DE19823223A DE19823223A1 (en) | 1998-05-20 | 1998-05-25 | Three-step etching of contact via |
GB9811203A GB2337850A (en) | 1998-05-20 | 1998-05-27 | Etching contact windows |
CN98102315.0A CN1237780A (en) | 1998-05-20 | 1998-05-29 | Contact window and its etching method |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002238128A CA2238128A1 (en) | 1998-05-20 | 1998-05-20 | 3-step etching for contact window |
DE19823223A DE19823223A1 (en) | 1998-05-20 | 1998-05-25 | Three-step etching of contact via |
GB9811203A GB2337850A (en) | 1998-05-20 | 1998-05-27 | Etching contact windows |
CN98102315.0A CN1237780A (en) | 1998-05-20 | 1998-05-29 | Contact window and its etching method |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9811203D0 true GB9811203D0 (en) | 1998-07-22 |
GB2337850A GB2337850A (en) | 1999-12-01 |
Family
ID=31499382
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9811203A Withdrawn GB2337850A (en) | 1998-05-20 | 1998-05-27 | Etching contact windows |
Country Status (4)
Country | Link |
---|---|
CN (1) | CN1237780A (en) |
CA (1) | CA2238128A1 (en) |
DE (1) | DE19823223A1 (en) |
GB (1) | GB2337850A (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7044212B1 (en) | 2000-08-25 | 2006-05-16 | Net Nanofiltertechnik Gmbh | Refrigeration device and a method for producing the same |
DE10041829B4 (en) * | 2000-08-25 | 2004-11-04 | N F T Nanofiltertechnik Gmbh | cooler |
DE10042235A1 (en) * | 2000-08-28 | 2002-04-18 | Infineon Technologies Ag | Process for producing an electrically conductive connection |
CN100383667C (en) * | 2002-02-08 | 2008-04-23 | 旺宏电子股份有限公司 | Semiconductor element pattern transferring method |
US7449407B2 (en) | 2002-11-15 | 2008-11-11 | United Microelectronics Corporation | Air gap for dual damascene applications |
DE102006026549A1 (en) | 2006-06-08 | 2007-12-13 | Audi Ag | Process for producing friction discs of ceramic materials with improved friction layer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5354386A (en) * | 1989-03-24 | 1994-10-11 | National Semiconductor Corporation | Method for plasma etching tapered and stepped vias |
US5180689A (en) * | 1991-09-10 | 1993-01-19 | Taiwan Semiconductor Manufacturing Company | Tapered opening sidewall with multi-step etching process |
EP0541160A1 (en) * | 1991-11-07 | 1993-05-12 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device whereby contact windows are provided in an insulating layer comprising silicon nitride in two etching steps |
JP2988122B2 (en) * | 1992-05-14 | 1999-12-06 | 日本電気株式会社 | Dry etching apparatus and method for manufacturing semiconductor device |
-
1998
- 1998-05-20 CA CA002238128A patent/CA2238128A1/en not_active Abandoned
- 1998-05-25 DE DE19823223A patent/DE19823223A1/en not_active Withdrawn
- 1998-05-27 GB GB9811203A patent/GB2337850A/en not_active Withdrawn
- 1998-05-29 CN CN98102315.0A patent/CN1237780A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
GB2337850A (en) | 1999-12-01 |
CN1237780A (en) | 1999-12-08 |
DE19823223A1 (en) | 1999-12-02 |
CA2238128A1 (en) | 1999-11-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |