GB9714364D0 - Method and substrate for wafer interconnection - Google Patents

Method and substrate for wafer interconnection

Info

Publication number
GB9714364D0
GB9714364D0 GBGB9714364.8A GB9714364A GB9714364D0 GB 9714364 D0 GB9714364 D0 GB 9714364D0 GB 9714364 A GB9714364 A GB 9714364A GB 9714364 D0 GB9714364 D0 GB 9714364D0
Authority
GB
United Kingdom
Prior art keywords
substrate
wafer interconnection
interconnection
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9714364.8A
Other versions
GB2327144A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to GB9714364A priority Critical patent/GB2327144A/en
Publication of GB9714364D0 publication Critical patent/GB9714364D0/en
Publication of GB2327144A publication Critical patent/GB2327144A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
GB9714364A 1997-07-09 1997-07-09 Method and substrate for wafer interconnection Withdrawn GB2327144A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9714364A GB2327144A (en) 1997-07-09 1997-07-09 Method and substrate for wafer interconnection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9714364A GB2327144A (en) 1997-07-09 1997-07-09 Method and substrate for wafer interconnection

Publications (2)

Publication Number Publication Date
GB9714364D0 true GB9714364D0 (en) 1997-09-10
GB2327144A GB2327144A (en) 1999-01-13

Family

ID=10815540

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9714364A Withdrawn GB2327144A (en) 1997-07-09 1997-07-09 Method and substrate for wafer interconnection

Country Status (1)

Country Link
GB (1) GB2327144A (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07115113A (en) * 1993-08-25 1995-05-02 Nec Corp Semiconductor wafer testing device and testing method
US6577148B1 (en) * 1994-08-31 2003-06-10 Motorola, Inc. Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer
JPH08148533A (en) * 1994-11-15 1996-06-07 Nec Corp Method and equipment for testing semiconductor wafer

Also Published As

Publication number Publication date
GB2327144A (en) 1999-01-13

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)