GB935433A - Improvements relating to electrical multiplying circuits - Google Patents

Abstract

935,433. Electric analogue computers. ELECTRIC & MUSICAL INDUSTRIES Ltd. Oct. 13, 1959 [Oct. 13, 1958; Feb. 18, 1959], Nos. 32591/58 and 5544/59. Class 37. [Also in Groups XXXIX and XL (b)] A multiplying circuit includes means for compensating for errors in the output thereof due to variations in the parameters of said circuit comprising means for applying a pilot signal to said circuit to produce an " error " signal representing said variations and means for applying said " error " signal to the circuit to counter the errors in the product output of the multiplying circuit. In the embodiment shown in Fig. 1, the invention is applied to the elimination of zero drift in a multiplier for reducing shading effects in a colour television camera by multiplying the video signal by a correcting signal. The video signal is applied to a current generator 2 and is multiplied, by a Hall plate 3, with a correcting signal applied at 5, and the product voltage corresponding to the corrected video signal is derived at 11. In order to compensate for zero drift or unbalance in the generator 2, a feed-back circuit is provided via gated amplifier 12 at detector 13, the operation of the circuit being as follows. When the video signal corresponds to a black there should be no input to the Hall plate from generator 2 and at this point the field gating pulses render amplifier 12 and oscillator 14 operative, the latter supplying the " pilot " signal to the other input of the Hall plate and a reference signal to detector 13. There may, however, due to zero drift or unbalance in generator 2 be an input to the Hall plate, an error signal will appear at the output of amplifier 12 corresponding to the product of the oscillator signal and said spurious signal from generator 2, the correcting D.C. signal being derived from detector 13 and applied to generator 2. A circuit diagram is given (Fig. 2, not shown). The embodiment of Fig. 3 is directed to a multiplying circuit for a stereo system in which an audio signal S 2 is multiplied by a control voltage S 1 by a Hall plate, but in which two higher frequency pilot signals (f1, f2 are employed, one with each main signal, the pilot signals being influenced by variations of resistance of the circuit due to temperature variations. The f1+f2 is filtered out by filter 57 and applied as a negative feed-back signal to vary the gain of amplifier 53 to compensate for said variations.