US2873066A - Electrical multiplier - Google Patents

Electrical multiplier Download PDF

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US2873066A
US2873066A US620553A US62055356A US2873066A US 2873066 A US2873066 A US 2873066A US 620553 A US620553 A US 620553A US 62055356 A US62055356 A US 62055356A US 2873066 A US2873066 A US 2873066A
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voltage
output
adding network
network
phase
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US620553A
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Henry F Mckenney
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Sperry Corp
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Sperry Rand Corp
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/16Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
    • G06G7/163Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division using a variable impedance controlled by one of the input signals, variable amplification or transfer function

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  • This invention relates to a multiplying device ⁇ which ⁇ employs means for establishing electrically a predetermined vectorial relationship between analog voltages representing the, quantities to be multiplied and the analog voltage representing their product.
  • MJComputers are known in the art for multiplying analogs which employ a potentiometer driven by another potentiometer or a servo mechanism. The accuracy of the output of these devices is limited'by their sensitivity and degree of calibration.
  • This invention contemplates the provision of a pair of adding networks and a variable voltage divider connected between the networks.
  • the output of the second network is similarly connected to the voltage divider through a phase sensitive device and represents the product of two analog voltages respectively placed into ⁇ the adding networks when the system has been stabilized.
  • the analog inputs in the adding networks are 90 out of phase and when the output of the second network is placed in phase with the analog input for the iirst network by means of the phase sensitive device and the variable voltage divider the system is stabilized.
  • the operation of the system may be established hy well known geometric principles using vectors to representv voltage amplitude and phase.V
  • the second network is adapted to receive a predetermined fraction of the analog voltage of the first network and its reference voltage in order to improve the versatility and accuracy of the system.
  • t One object of the invention therefore, is to provide a multiplying device the mode of operation of which is exclusively dependent on electrical means. 4
  • Another object of the device is to provide an electrical multiplier having improved accuracy and versatility.
  • Fig. ⁇ 1 isI a schematic illustration of the arrangement of units which constitute the computing system
  • Fig. 2 is a vector diagram showing the voltage relationships established by the first adding network
  • Fig. 3 is a vector diagram showing the voltage relationships established by the second adding network after correction by a demodulator.
  • Fig. 4 is a vector diagram showing the voltage relationships established by the second adding network before correction by the demodulator.
  • a potentiometer 1 is referenced by reference voltage A of approximately 8 volts and zero degrees phase on line 2 and is driven by means of shaft 3 which is settahle in accordance with an input quantity X.
  • a three legged adding network 4 is connected to the potentiometer 1 by a lead 5 which serves to introduce analog voltage output Ex into the network.
  • a second leg of the network 4 is connected to lead 6 on which there is placed a reference voltage B of approximately 8 volts and ninety degrees phase.
  • a single channel amplier 7 is connected to the adding network 4 by lead 8 and the t Patented Feb. 10,1959
  • amplifier output on line 10 is placed on the third leg of the adding network 4 by means of feedback line 11.
  • variable voltage divider 12 which comprises a resistor 13 and is series connected to one side of a non-linear resistance bridge 14 the other side of which is grounded.
  • a line 15 connects one leg of a second adding network 16 to the voltage divider 12 at a point between the resistor 13 and the resistance bridge 14 and carries a voltage Eo.
  • a second leg of the adding network 16 is connected to the output side of potentiometer 17 by means of lead 18.
  • the potentiometer 17 is referenced by the ninety degree phase voltageV Eb on lead 20 and is driven by shaft 21 settahle in accordance with a second input Y.
  • the output of the adding network 16 on lead 22 is amplified by a second amplifier 23 whose output voltage ED on lead 24 represents the product of the two quantities X and Y.
  • the output is fed back to a third leg of the adding network 16 on feedback line 25 and when the latter is nulled the complete output of the network box on lead 24 is assured.
  • an output lead 26 connected to lead 24 for feeding the analog product Ep to an appropriate indicator (not shown).
  • a phase sensitive demodulator 27 which is set to pass voltages of ninety degrees phase and remove voltages of zero degrees phase every half cycle is connected to lead 24 through a switch 28, an attenuator 29, which reduces the voltage input to the demodulator, and lead 30.
  • a filter and integrator network 31 is provided to receive the demodulator output of the demodulator 27 on lead 32 serving to stabilize the system by reducing the fluctuations of the voltage divider output E0.
  • the output of the filter and integrator 31 is fed to a modulator 33 on lead 34 to convert the signal to A. C. for the following amplifier comprising a transformer 35 and servo amplifier 36 which are connected to the modulator 33 by means of lead 37.
  • The'ampliiier signal is t-hen placed in rectifier 37 by lead 38 and a D. C. lilter 40 by lead 41 whereupon the signal is fed to the resistance bridge, 14.
  • the resistance bridge 14 comprises four equal resistances R1, R2, R3 and R4.
  • Lead 42 and lead 43 connect the iilter across the bridge in one direction while its opposite points are connected to resistor 13 and ground.
  • a fourth leg of the adding network 16 is connected to the lead 5 by means of lead 44 having a resistor 45 provided therein whereby the voltage Ez/Z may he introduced to the network.
  • the reference voltage Eb/Z is placed on a lifth leg of the adding network 16 by means of connection 47.
  • the amplified output of the adding network 4 is the voltage V which is the resultant of the reference voltage Eb and the analog voltage EX.
  • the first vertical triangle is thereby established as shown in Fig. 3.
  • the voltage V is then applied as voltage Eo to the input circuit of the adding network 16 by means of the variable voltage divider 12.
  • the input to the amplifier 23 comprises at least three voltages, E0, Ey and output voltage Ep, and desirably reference voltage Eb/Z and analog voltage Ez/Z.
  • the resultant voltage Ep is generated by the amplifier and fed back to the adding network 16. This establishes the second triangle shown in Fig. 2.
  • a Voltage Ep could exist at the output of the amplifier 23 even if the demodulator circuit did not exist.
  • the second triangle would not necessarily be similar to the first established triangle and could be a triangle as shown in Fig. 4.
  • the function of the demodulator circuit and voltage divider is, therefore, to attenuate the voltage Eo so that the phase of voltage Ep is rotated clockwise until it is positioned ninety degrees from Ey.
  • the second triangle has become similar to the first and Ep is proportional to the product of the input quantities X and Y.
  • the demodulator In order for the voltage divider to attenuate the voltage V so that the voltage Ep has no Y component voltage, the demodulator must sense Y components of Ey in the output voltage Ep. To accomplish this the demodulator contacts are operated in phase with Ey; thus, the demodulator is sensitive to voltage in phase with Ey while components'of voltage having the desired phase of Ep will cancel during each half cycle of operation, and only components of the amplifier output in phase with Ey will pass to the output of the demodulator. This detected voltage will be integrated and amplified in the demodulator circuit to vary the attenuation of the voltage V until the only voltage at the output of amplifier 23 is Ep l0".
  • the voltage divider therefore, must have the characteristic that the equivalent resistance of the bridge will change proportionately with the demodulated signal.
  • An electric multiplier comprising an adding network, means for introducing a reference and an analog voltage to said adding network, voltage attenuating means connected to the output of said adding network, a second adding network connected to the output of said voltage attenuating means, means for introducing into said second adding network a second analog voltage having a ninety degree phase diierence from the analog voltage placed in the ⁇ first adding network, a phase sensitive demodulator and amplifier connected to the output of said second adding network and in control of said voltage attenuating means, said demodulator being set to pass voltages in phase with the analog voltage placed in said second adding network, there being means for setting into said second adding network a preselected fraction of the reference and analog voltages placed into the first adding network whereby the multiplier is adapted to yield the product of the analog voltage placed in the first adding network and positive or negative analog voltage placed in the second adding network.
  • An electric multiplier comprising an adding network, means for introducing a reference and an analog voltage to said adding network, voltage attenuating means connected to the output of said adding network, a second adding network connected to the output of said voltage attenuating means, means for introducing into said second adding network a second analog voltage having a ninety degree phase difference from the analog voltage placed in the first adding network, a control circuit connected to the output of said second adding network and in control of said attenuating means, said control circuit including in series an attenuator, a phase sensitive demodulator, a modulator for converting the rectified output of said demodulator to an alternating current voltage, a transformer and amplier for amplifying said alternating current voltage and a rectifier for reconverting said alternating current voltage to direct current voltage, said demodulator being set to pass voltages in phase with the analog voltage placed in said second adding network, there being means for setting into said second adding network a preselected fraction of the reference and analog voltages placed into the first adding network whereby the multiplier ⁇

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
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  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)

Description

Feb. `10, 1959 H. F. MCKENNEY 2,873,066
ELECTRICAL MULTIPLIE'R Filed Nov. 5, 1956 INVENTOR Hf/VEY Nc KE/vA/EY ATTO RNEY Uni-fed Safes Patat o 2,873,066 ELECTRICAL MULTIPLIER Henry F. McKeuney, Weston, Mass., assignor to Sperry Rand Corporation, Ford Instrument Company Division, Long Island City, N. Y., a corporation of Delaware Application November 5, 1956, Serial No. 620,553
2 Claims. (Cl. 23S-185) This invention relates to a multiplying device `which `employs means for establishing electrically a predetermined vectorial relationship between analog voltages representing the, quantities to be multiplied and the analog voltage representing their product. MJComputers are known in the art for multiplying analogs which employ a potentiometer driven by another potentiometer or a servo mechanism. The accuracy of the output of these devices is limited'by their sensitivity and degree of calibration. This invention contemplates the provision of a pair of adding networks and a variable voltage divider connected between the networks. The output of the second network is similarly connected to the voltage divider through a phase sensitive device and represents the product of two analog voltages respectively placed into `the adding networks when the system has been stabilized. The analog inputs in the adding networks are 90 out of phase and when the output of the second network is placed in phase with the analog input for the iirst network by means of the phase sensitive device and the variable voltage divider the system is stabilized. The operation of the system may be established hy well known geometric principles using vectors to representv voltage amplitude and phase.V Preferably the second network is adapted to receive a predetermined fraction of the analog voltage of the first network and its reference voltage in order to improve the versatility and accuracy of the system. t `One object of the invention therefore, is to provide a multiplying device the mode of operation of which is exclusively dependent on electrical means. 4
` Another object of the device is to provide an electrical multiplier having improved accuracy and versatility. Other objects and advantagesof the invention may be appreciated on reading the following detailed description in conjunction with the accompanying drawings, in which:
Fig.` 1 isI a schematic illustration of the arrangement of units which constitute the computing system;
Fig. 2 is a vector diagram showing the voltage relationships established by the first adding network;
Fig. 3 is a vector diagram showing the voltage relationships established by the second adding network after correction by a demodulator; and
Fig. 4 is a vector diagram showing the voltage relationships established by the second adding network before correction by the demodulator.
According to Fig. l a potentiometer 1 is referenced by reference voltage A of approximately 8 volts and zero degrees phase on line 2 and is driven by means of shaft 3 which is settahle in accordance with an input quantity X. A three legged adding network 4 is connected to the potentiometer 1 by a lead 5 which serves to introduce analog voltage output Ex into the network. A second leg of the network 4 is connected to lead 6 on which there is placed a reference voltage B of approximately 8 volts and ninety degrees phase. A single channel amplier 7 is connected to the adding network 4 by lead 8 and the t Patented Feb. 10,1959
amplifier output on line 10 is placed on the third leg of the adding network 4 by means of feedback line 11.
The lead 10 is connected to one side of variable voltage divider 12 which comprises a resistor 13 and is series connected to one side of a non-linear resistance bridge 14 the other side of which is grounded.
A line 15 connects one leg of a second adding network 16 to the voltage divider 12 at a point between the resistor 13 and the resistance bridge 14 and carries a voltage Eo. A second leg of the adding network 16 is connected to the output side of potentiometer 17 by means of lead 18. The potentiometer 17 is referenced by the ninety degree phase voltageV Eb on lead 20 and is driven by shaft 21 settahle in accordance with a second input Y. The output of the adding network 16 on lead 22 is amplified by a second amplifier 23 whose output voltage ED on lead 24 represents the product of the two quantities X and Y. The output is fed back to a third leg of the adding network 16 on feedback line 25 and when the latter is nulled the complete output of the network box on lead 24 is assured. There is provided an output lead 26 connected to lead 24 for feeding the analog product Ep to an appropriate indicator (not shown).
As shown below it is necessary to insure that the voltage Ep on the lead 24 is in phase with the analog voltage EX in the adding network 4. The voltage Ex is assumed to have a phase of Zero degrees. It is therefore required to detect the presence of voltages having a ninety degree phase relation thereto and adjust the input of adding network 16 to remove the same from its output. Accordingly, a phase sensitive demodulator 27 which is set to pass voltages of ninety degrees phase and remove voltages of zero degrees phase every half cycle is connected to lead 24 through a switch 28, an attenuator 29, which reduces the voltage input to the demodulator, and lead 30. Preferably a filter and integrator network 31 is provided to receive the demodulator output of the demodulator 27 on lead 32 serving to stabilize the system by reducing the fluctuations of the voltage divider output E0. i
The output of the filter and integrator 31 is fed to a modulator 33 on lead 34 to convert the signal to A. C. for the following amplifier comprising a transformer 35 and servo amplifier 36 which are connected to the modulator 33 by means of lead 37. The'ampliiier signal is t-hen placed in rectifier 37 by lead 38 and a D. C. lilter 40 by lead 41 whereupon the signal is fed to the resistance bridge, 14. The resistance bridge 14 comprises four equal resistances R1, R2, R3 and R4. Lead 42 and lead 43 connect the iilter across the bridge in one direction while its opposite points are connected to resistor 13 and ground. Any change in the filter supply voltage causes a corresponding change in the IR drops across the individual bridge resistors and hence across the bridge itself.- The voltage drop across the bridge is thereby controlled by the demodulated signal to attenuate the voltage E0, which is the adjusted voltage output, V of the adding network 4, so as to eliminate Y voltage components from the output of the adding network 16. p
In order to improve the range and versatility of the multiplier and to enable it to operate with negative analogs of the Y input a fourth leg of the adding network 16 is connected to the lead 5 by means of lead 44 having a resistor 45 provided therein whereby the voltage Ez/Z may he introduced to the network. The reference voltage Eb/Z is placed on a lifth leg of the adding network 16 by means of connection 47.
As mentioned above the operation of the device depends on means for phase controlling the input and output voltages of the adding networks. The amplified output of the adding network 4 is the voltage V which is the resultant of the reference voltage Eb and the analog voltage EX. The first vertical triangle is thereby established as shown in Fig. 3. The voltage V is then applied as voltage Eo to the input circuit of the adding network 16 by means of the variable voltage divider 12. The input to the amplifier 23 comprises at least three voltages, E0, Ey and output voltage Ep, and desirably reference voltage Eb/Z and analog voltage Ez/Z. The resultant voltage Ep is generated by the amplifier and fed back to the adding network 16. This establishes the second triangle shown in Fig. 2. It can be seen that a Voltage Ep could exist at the output of the amplifier 23 even if the demodulator circuit did not exist. However, without the demodulator circuit the second triangle would not necessarily be similar to the first established triangle and could be a triangle as shown in Fig. 4. The function of the demodulator circuit and voltage divider is, therefore, to attenuate the voltage Eo so that the phase of voltage Ep is rotated clockwise until it is positioned ninety degrees from Ey. When the voltage Ep is ninety degrees out of phase with Ey, the second triangle has become similar to the first and Ep is proportional to the product of the input quantities X and Y. In order for the voltage divider to attenuate the voltage V so that the voltage Ep has no Y component voltage, the demodulator must sense Y components of Ey in the output voltage Ep. To accomplish this the demodulator contacts are operated in phase with Ey; thus, the demodulator is sensitive to voltage in phase with Ey while components'of voltage having the desired phase of Ep will cancel during each half cycle of operation, and only components of the amplifier output in phase with Ey will pass to the output of the demodulator. This detected voltage will be integrated and amplified in the demodulator circuit to vary the attenuation of the voltage V until the only voltage at the output of amplifier 23 is Ep l0".
The voltage divider, therefore, must have the characteristic that the equivalent resistance of the bridge will change proportionately with the demodulated signal.
It is understood that the invention is independent of the specific units described in its preferred form, and alterations may be made therein without departing from the principle and scope of the invention as defined in the appended claims.
What is claimed is:
1. An electric multiplier comprising an adding network, means for introducing a reference and an analog voltage to said adding network, voltage attenuating means connected to the output of said adding network, a second adding network connected to the output of said voltage attenuating means, means for introducing into said second adding network a second analog voltage having a ninety degree phase diierence from the analog voltage placed in the `first adding network, a phase sensitive demodulator and amplifier connected to the output of said second adding network and in control of said voltage attenuating means, said demodulator being set to pass voltages in phase with the analog voltage placed in said second adding network, there being means for setting into said second adding network a preselected fraction of the reference and analog voltages placed into the first adding network whereby the multiplier is adapted to yield the product of the analog voltage placed in the first adding network and positive or negative analog voltage placed in the second adding network.
2. An electric multiplier comprising an adding network, means for introducing a reference and an analog voltage to said adding network, voltage attenuating means connected to the output of said adding network, a second adding network connected to the output of said voltage attenuating means, means for introducing into said second adding network a second analog voltage having a ninety degree phase difference from the analog voltage placed in the first adding network, a control circuit connected to the output of said second adding network and in control of said attenuating means, said control circuit including in series an attenuator, a phase sensitive demodulator, a modulator for converting the rectified output of said demodulator to an alternating current voltage, a transformer and amplier for amplifying said alternating current voltage and a rectifier for reconverting said alternating current voltage to direct current voltage, said demodulator being set to pass voltages in phase with the analog voltage placed in said second adding network, there being means for setting into said second adding network a preselected fraction of the reference and analog voltages placed into the first adding network whereby the multiplier `is adapted to yield the product of the analog voltage placed in the first adding network and positive or negative analog voltage placed in the second adding network.
References Cited in the file of this patent UNITED STATES PATENTS 2,733,004 Richardson Jan. 31, 1956 2,812,132 Hauser Nov. 5, 1957 FOREIGN PATENTS 620,867 Great Britain Mar. 31, 1949 757,251 Great Britain Sept. 19, 1956 OTHER REFERENCES Journal of Association for Computing Machinery 0 (Edwards), January 1954; pages 28-29.
Servo Mechanism Practice (Ahrendt), 1954', pages 72-75.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2926852A (en) * 1956-05-01 1960-03-01 Hughes Aircraft Co Electronic resolver
US3032271A (en) * 1957-07-22 1962-05-01 Continental Oil Co Apparatus for determination of seismic data corrections
US3256427A (en) * 1962-03-15 1966-06-14 Standard Oil Co Facility location computer

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB620867A (en) * 1947-01-28 1949-03-31 Ferranti Ltd Improvements relating to electrical computing instruments
US2733004A (en) * 1950-05-26 1956-01-31 phase
GB757251A (en) * 1954-04-02 1956-09-19 Sperry Corp Improvements in and relating to electronic computers
US2812132A (en) * 1951-01-16 1957-11-05 Sperry Rand Corp Electronic computer

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB620867A (en) * 1947-01-28 1949-03-31 Ferranti Ltd Improvements relating to electrical computing instruments
US2733004A (en) * 1950-05-26 1956-01-31 phase
US2812132A (en) * 1951-01-16 1957-11-05 Sperry Rand Corp Electronic computer
GB757251A (en) * 1954-04-02 1956-09-19 Sperry Corp Improvements in and relating to electronic computers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2926852A (en) * 1956-05-01 1960-03-01 Hughes Aircraft Co Electronic resolver
US3032271A (en) * 1957-07-22 1962-05-01 Continental Oil Co Apparatus for determination of seismic data corrections
US3256427A (en) * 1962-03-15 1966-06-14 Standard Oil Co Facility location computer

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