GB9223130D0 - On chip semiconductor memory arbitrary pattern,parallel test apparatus and method - Google Patents
On chip semiconductor memory arbitrary pattern,parallel test apparatus and methodInfo
- Publication number
- GB9223130D0 GB9223130D0 GB929223130A GB9223130A GB9223130D0 GB 9223130 D0 GB9223130 D0 GB 9223130D0 GB 929223130 A GB929223130 A GB 929223130A GB 9223130 A GB9223130 A GB 9223130A GB 9223130 D0 GB9223130 D0 GB 9223130D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- semiconductor memory
- test apparatus
- chip semiconductor
- parallel test
- arbitrary pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/26—Accessing multiple arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21710988 | 1988-08-30 | ||
JP1137972A JPH0748319B2 (en) | 1988-08-30 | 1989-05-31 | Semiconductor memory device |
GB8918830A GB2222461B (en) | 1988-08-30 | 1989-08-17 | On chip testing of semiconductor memory devices |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9223130D0 true GB9223130D0 (en) | 1992-12-16 |
GB2259594A GB2259594A (en) | 1993-03-17 |
GB2259594B GB2259594B (en) | 1993-06-30 |
Family
ID=27264642
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9213630A Expired - Lifetime GB2256279B (en) | 1988-08-30 | 1992-06-26 | Semiconductor memory device |
GB9223130A Expired - Lifetime GB2259594B (en) | 1988-08-30 | 1992-11-04 | Semiconductor memory device |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9213630A Expired - Lifetime GB2256279B (en) | 1988-08-30 | 1992-06-26 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
GB (2) | GB2256279B (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR940006676B1 (en) * | 1991-10-14 | 1994-07-25 | 삼성전자 주식회사 | Semiconductor ic having test cirucit for memory |
KR100212420B1 (en) * | 1995-09-25 | 1999-08-02 | 김영환 | Cash static ram having a test circuit |
KR100197554B1 (en) * | 1995-09-30 | 1999-06-15 | 윤종용 | Speedy test method of semiconductor memory device |
JPH09161476A (en) * | 1995-10-04 | 1997-06-20 | Toshiba Corp | Semiconductor memory, its testing circuit and data transfer system |
KR100494281B1 (en) * | 1996-10-31 | 2005-08-05 | 텍사스 인스트루먼츠 인코포레이티드 | Integrated circuit memory device having current-mode data compression test mode |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4872168A (en) * | 1986-10-02 | 1989-10-03 | American Telephone And Telegraph Company, At&T Bell Laboratories | Integrated circuit with memory self-test |
-
1992
- 1992-06-26 GB GB9213630A patent/GB2256279B/en not_active Expired - Lifetime
- 1992-11-04 GB GB9223130A patent/GB2259594B/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
GB2259594A (en) | 1993-03-17 |
GB2256279B (en) | 1993-05-12 |
GB2259594B (en) | 1993-06-30 |
GB9213630D0 (en) | 1992-08-12 |
GB2256279A (en) | 1992-12-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
746 | Register noted 'licences of right' (sect. 46/1977) |
Effective date: 19950810 |
|
PE20 | Patent expired after termination of 20 years |
Expiry date: 20090816 |