GB915336A - Improvements in or relating to methods of forming junctions in silicon bodies - Google Patents

Improvements in or relating to methods of forming junctions in silicon bodies

Info

Publication number
GB915336A
GB915336A GB3784860A GB3784860A GB915336A GB 915336 A GB915336 A GB 915336A GB 3784860 A GB3784860 A GB 3784860A GB 3784860 A GB3784860 A GB 3784860A GB 915336 A GB915336 A GB 915336A
Authority
GB
United Kingdom
Prior art keywords
silicon
aluminium
discs
copper
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3784860A
Inventor
David Thomas Lewis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co PLC
Original Assignee
General Electric Co PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co PLC filed Critical General Electric Co PLC
Priority to GB3784860A priority Critical patent/GB915336A/en
Publication of GB915336A publication Critical patent/GB915336A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

915,336. Semi-conductor devices. GENERAL ELECTRIC CO. Ltd. Sept. 28, 1961 [Nov. 3, 1960], No. 37848/60. Class 37. In a method of forming a junction in a silicon body by an aluminium alloying process that part of the surface of the body with which the alloying material is to be brought into contact is first treated with a reagent which forms a fresh surface on the silicon and deposits on this a thin film of at least one of the elements copper, silver, and indium. To form a PNP junction transistor a silicon wafer is immersed in a solution of nitric, hydrofluoric, and acetic acids which also contains aqueous copper nitrate, the treated wafer having a surface film of copper. The washed and dried wafer is placed in a jig with aluminium discs on its opposite faces and with a ring of gold/antimony alloy symmetrically surrounding the smaller of the two discs. Molybdenum thermal compensator discs corresponding in size to the aluminium discs are placed on top of the latter and the assembly heated in a reducing atmosphere to form two substantially plane parallel junctions and a ring-base contact. After etching to remove any residual copper and other surface contaminants the assembly is mounted in a sealed envelope. All or part of the copper nitrate may be replaced by equivalent amounts of silver nitrate or indium sulphate. Instead of using pure aluminium to form the junctions aluminium containing small amounts of elements such as boron and silicon may be used. It is stated that alternatively the alloying material may be melted and then brought into contact with the silicon in the liquid state.
GB3784860A 1960-11-03 1960-11-03 Improvements in or relating to methods of forming junctions in silicon bodies Expired GB915336A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB3784860A GB915336A (en) 1960-11-03 1960-11-03 Improvements in or relating to methods of forming junctions in silicon bodies

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3784860A GB915336A (en) 1960-11-03 1960-11-03 Improvements in or relating to methods of forming junctions in silicon bodies

Publications (1)

Publication Number Publication Date
GB915336A true GB915336A (en) 1963-01-09

Family

ID=10399432

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3784860A Expired GB915336A (en) 1960-11-03 1960-11-03 Improvements in or relating to methods of forming junctions in silicon bodies

Country Status (1)

Country Link
GB (1) GB915336A (en)

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