GB9111002D0 - Memory decode system - Google Patents
Memory decode systemInfo
- Publication number
- GB9111002D0 GB9111002D0 GB919111002A GB9111002A GB9111002D0 GB 9111002 D0 GB9111002 D0 GB 9111002D0 GB 919111002 A GB919111002 A GB 919111002A GB 9111002 A GB9111002 A GB 9111002A GB 9111002 D0 GB9111002 D0 GB 9111002D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- decode system
- memory decode
- memory
- decode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9111002A GB2256293A (en) | 1991-05-21 | 1991-05-21 | Memory decode system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9111002A GB2256293A (en) | 1991-05-21 | 1991-05-21 | Memory decode system |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9111002D0 true GB9111002D0 (en) | 1991-07-10 |
GB2256293A GB2256293A (en) | 1992-12-02 |
Family
ID=10695383
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9111002A Withdrawn GB2256293A (en) | 1991-05-21 | 1991-05-21 | Memory decode system |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2256293A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0613088A1 (en) * | 1993-02-24 | 1994-08-31 | Digital Equipment Corporation | Method of memory interleaving and memory systems interleaved thereby |
WO1996037841A1 (en) * | 1995-05-26 | 1996-11-28 | National Semiconductor Corporation | Dram controller that reduces the time required to process memory requests |
US6782466B1 (en) * | 1999-11-24 | 2004-08-24 | Koninklijke Philips Electronics N.V. | Arrangement and method for accessing data in a virtual memory arrangement |
US6625685B1 (en) * | 2000-09-20 | 2003-09-23 | Broadcom Corporation | Memory controller with programmable configuration |
GB2495533A (en) * | 2011-10-13 | 2013-04-17 | St Microelectronics Res & Dev | Distributing buffer data evenly across different memory devices |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4740911A (en) * | 1984-10-12 | 1988-04-26 | Elxsi International | Dynamically controlled interleaving |
-
1991
- 1991-05-21 GB GB9111002A patent/GB2256293A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
GB2256293A (en) | 1992-12-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |