905,509. Electric synchronous transmission systems. SIEMENS & HALSKE A.G. Jan. 19, 1960 [Jan. 19, 1959], No. 1927/60. Class 40 (3). [Also in Group XL (c)] Synchronizing apparatus for synchronizing a receiver to a transmitter in a synchronous transmission system comprises means for deriving synchronizing information from the message information pulses, a control device to deliver to the receiver a control or driving frequency which can be modified, comparator means to compare the synchronizing information derived from the received signals with the said control frequency and to control the modifying means to maintain the receiver in synchronism with the transmitter, in conjunction with means to determine when the received signals are disturbed by more than a predetermined amount, and means responsive to such determination to interrupt automatically the control operation effected by the comparator means. The incoming signals, received at the input terminal a and which may be amplitude modulations of a carrier frequency, are demodulated and amplified at E to the waveform, Fig. 2 (1), which is differentiated and rectified at D1 to form pulses, as shown in Fig. 2 (2), at a frequency corresponding to basic occurrence frequency of the signal elements. A crystal-controlled oscillator 9 provides a frequency nf subdivided at T1 to form a frequency f passed over contact u1 and differentiator D2 to furnish synchronizing pulses at terminal b leading to a transmitting distributer. The frequency nf is also subdivided at T2 to produce a frequency 4f which is passed through a phase-shifter Ph and a dividing circuit T3 to produce a frequency 2f, indicated in Fig. 2 (3), which is phased in relation to the pulses Fig. 2 (2) and which is passed to a phase-comparison device PV, and also to a differentiating circuit D5. The frequency 4f is halved at T4, and the frequency 2f passes to a gate G1, to which the output of D1 is passed, and also to halving circuit T5 from which the frequency f passes to differentiator D3 to provide synchronizing pulses at terminal c for the receiving apparatus, which may include a distributer. If, as shown at instants t1, t2, t3, the synchronizing pulses are correctly spaced relative to the negative-positive transitions of the frequency 2f, Fig. 2 (3), equal negative and positive voltages are applied to a capacitor (not shown) forming part of PV, and similarly a pulse beginning early and ending late, as exemplified by the negative pulse relative to the instants t5, t6 produces balancing voltages on the capacitor of PV. If, however, the incoming pulses are persistently out-of-phase in relation to the voltage waveform, Fig. 2 (3), a negative or positive voltage is, for example, built up and a pulse is fed to the divider T2 which adds or subtracts a pulse. At the same time a relay U (not shown) is operated and via contact 2 u2, u3 a voltage is applied to a stepping switch SS operating a variable or trimming capacitor C1 to vary slightly in the required direction the frequency generated by the oscillator G. The frequency 2f from divider T4 is also passed to switches S1, S2 and functions to close switch S1 at about one-quarter the element period and to hold it closed for a time equal to half the element period, the switch S2 being opened when S1 is closed, and vice versa. During the central halfelement period the capacitor C2 is charged positively or negatively according to the element, and when the switch S2 closes at the end of the sampling period the corresponding pulse is passed. The pulses from the capacitor C2 are rectified at Gr1 and applied to a bi-stable flip-flop K2 to which are also applied the pulses from T4 which are differentiated at D4 and with the negative pulses suppressed at Gr2 as indicated by Fig. 3 (7). If the magnitude of a pulse is small, as shown in Fig. 3 (5), the normal switching of K2 does not take place. Also, via differentiator D5 and rectifier Gr3 positive pulses derived from the waveform Fig. 3 (3), and forming the pulse train Fig. 3 (9), are applied simultaneously to two gates G2, G3 connected to a flip-flop K3. Normally, when reception is good, the flip-flop K2 is switched by the pulse through Gr1 at the time when a pulse arrives via Gr3 so that gate G3 is open to retain the flip-flop K3 in its normal condition. If, however, through interference, the flip-flop K2 is not triggered by a pulse from C2 through Gr1, the gate G2 is open to the pulse via Gr3 which changes flip-flop K3 to the position in which it slowly charges a capacitor C3. If an isolated disturbance occurs the flip-flop K3 is restored to its normal position by the next code element and the charge on C3 leaks away, but in response to a rapid succession of disturbances the charge on C3 is built up sufficiently to operate a relay AR closing contacts ar which short-circuit the capacitor circuit of the phase-comparator PV to inhibit the correcting action. In a modified arrangement, the waveform from the frequency divider T4 is inverted before being applied to the gate G1 so that synchronizing pulses corresponding to Fig. 2 (2) produced when the telegraph distortion exceeds Π25% do not affect the synchronizing process. The arrangement can include electro-mechanical apparatus in lieu of the electronic devices described.