DE1083852B - Method and circuit arrangement for maintaining phase-correct synchronization in synchronous telegraphy transmission systems in the event of severely disturbed reception - Google Patents

Description

When telegraphic transmission over fault-prone connections, z. B. via shortwave radio links, Synchronous transmission systems have preference over systems that mostly used it on good lines Use the start-stop procedure, since single or several consecutive disturbed telegraphing steps do not impair the required synchronization between the sending and receiving equipment can. In start-stop transmission systems, for. B. a single disturbed starting step result have that besides the telegraph character to which the disturbed starting step belongs, there are many more undisturbed characters are received incorrectly. With synchronous systems (synchronous telegraphy transmission systems) on the other hand, only those characters are received incorrectly within whose step groups a or several steps have been falsified, for example by interference on the transmission path. Synchronous systems have the further advantage that they are equipped with devices for fully automatic error correction, for example by repeating the disturbed characters. Multiple the time division multiplex transmission method is also used in synchronous systems, which allows creates, simultaneously several telegraph messages over a single transmission channel, e.g. B. on a radio carrier wave.

In synchronous systems, the circulation of the transmitting and receiving devices is generally controlled by the Frequency controlled by high-constant oscillators. The phase-correct synchronization once set between the transmitting and the receiving device, however, can only be achieved by the achievable constancy of the Oscillator frequencies cannot be sustained for an indefinite period of time. Runtime changes the transmission path and small frequency differences of the control oscillators at the transmitter and Receivers gradually lead to phase errors which are corrected to ensure reception have to.

In-phase synchronization is intended to mean that the receiving device, e.g. B. a reception distributor, is at least roughly adjusted in its circulation phase so that the individual telegraphing steps are correct are combined into complete code characters and that, in the case of multiplexing, the received Characters are correctly distributed to the various channel receivers to which they belong. Is the length of time during which the individual telegraphing steps are scanned, shorter than the step duration, so are for the scanning allow certain time tolerances. However, the sampling is only allowed within the duration of the telegraphing step to be scanned and not on the preceding or following Procedure and. Circuit arrangement

to maintain the in-phase

Synchronism in synchronous telegraphy

Transmission systems
if the reception is badly disturbed

Applicant:
Siemens & Halske Aktiengesellschaft,

Berlin and Munich,
Munich 2, Witteisbacherplatz 2

Hans Rudolph, Munich-Solln,

and Dipl.-Phys. Alfred Schelling, Munich,

have been named as inventors

Overlap telegraph step. In order to meet the permissible tolerances as completely as possible, the inevitable Fluctuations in transit time on the transmission path, the telegraphic distortion and possible fluctuations to reserve in the rotational speed, the aim is to scan as precisely as possible in the to keep the middle time within the target step duration. The timing of the sampling within the The duration of the step is referred to below as the sampling phase.

Methods and devices for rotating the sampling phase of the receiving device forwards or backwards in the event of an accumulated phase error are known. Either the Step inserts are used in the received message signal, of which suitable synchronization signals, z. B. pulses are derived, or there are particularly periodic synchronization signals sent by the transmitter in addition to the message signal steps and removed again in the receiver. In general, not every single synchronization pulse is generated when it reaches the target point in time in differs with respect to the sampling phase of the receiving device, used for phase correction. As a result of

009 547/161

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unavoidable, in the devices and on the over- during part of the same is charged and transmission path resulting telegraphic distortion thus forms the voltage or current integral. If the synchronization signals scatter over time, the charge of the capacitor increases at the end of the mean value. The phase correction is therefore made in the all charging time not a certain predetermined mean only if the longer 5 value, so z. B. a flip-flop is not switched time averaged phase position of the synchronization signals and the step is assessed as unsafe,
shows a phase error. Several unsafe steps are taken immediately

If it turns out that the phase corrections are received again one after the other, then a (incorrect)

averaged over a longer period of time, predominantly suppressed in the same Rieh synchronization. However, the

processing (forward or backward), the io is uncertainly received steps at larger intervals

an indication that the frequency of the receiver is on, so that a synchronization is ensured

Control oscillator is not exactly possible with that of the transmitter. You can do this e.g. B. by a parallel

Control oscillator matches. You can now use a circuit consisting of a capacitor and a resistor

each phase correction or after the formation of a middle class, the capacitor with each

value from several phase corrections the frequency 15 uncertainly received step receives a charging pulse,

of the receiver control oscillator by a very small size

Adjust the amount. After a lot of such frequency, if several unsafe steps in a row

Adjustments will then be the frequency of the receiver being received, the charges on the capacitor

The control oscillator can be summed up practically exactly with the frequency and when a specified value is exceeded

of the transmitter control oscillator match. 20 value z. B. a relay to respond temporarily

When using highly constant control oscillators, the switching of a contact creates a

this method has the great advantage that the de-synchronization prevents, but that if

scanning phase of the receiving device itself after one of the uncertainly received steps in larger

Total interruption of the transmission path from many stalls, charges appear on the capacitor

Minutes or even several hours in duration, 25 flow through the parallel resistance mentioned and

is preserved so precisely that it remains ineffective.

No need to reset the synchronization phase. This can be an additional improvement Immediately after the end of the sub-transmission, one can achieve that - if the synchro-break time is derived go on, and if the synchronizing signals from the step envelopes of the received system with a device for automatic error 30 telegraph signals - only such synchronization signals Correction by repeating the disturbed characters for the synchronization makes the is equipped on the basis of automatic inquiry, originate from telegraph signals, their telegraphso the transmission will continue automatically without distortion not exceeding a certain percentage a single message progresses through the interruption. You can do this e.g. B. by a coincidence sign has been lost. 35 gates realize that only during one part

In particular if the transmission path is one of the target step duration for the received

If the radio link is shortwave, it can often occur - synchronization signals derived from signal steps

men that the reception of messages is controlled completely impermeably.

broken or by bad transmission conditions Of course one can disturb the procedure and the sound is strong. The radio receiver deceives 40 processing arrangement according to the invention by combination then through input noise and through extraneous effects by other known means tensions from the atmosphere perfect wrong synchronization, e. B. with an accumulation of phase signals before, on which the phase correction device corrects according to a direction in times of good can respond and at the same time the previous reception an adjustment of the frequency of the received Receipt of the correct phase synchronism 45 catcher control oscillator to the transmitter control so can regulate far out of the nominal phase position that oscillator in the described elsewhere after the end of the malfunction, provide for a proper way.

ger receipt of the message no longer readily The invention can both in electromechanical

is possible. as well as in purely electronic synchronous

In the invention, this disadvantage will be applied to 50 transmission systems,

eliminates the fact that the received telegraphic characters are based on details of the invention on hand of a

their transmission security are monitored and explained advantageous embodiment. the

that when too frequent transmission is detected, description takes place on the basis of FIGS. 1 to 3.

fail the synchronization process automatically under- Fig. 1 shows a simplified arrangement

is bound. To determine such reception 55 for synchronization of synchronous telegraphic transmission

malfunctions can be caused by test and evaluation switchgear systems with devices according to the invention

be seen the received news or dung;

Check synchronizing signal steps for their safety Fig. 2 contains timing diagrams for the basic

and in the event of an accumulation of uncertainly received steps, explanation of the synchronization process without taking into account

the response of the synchronizing device prevents the invention;

to the. To check the security of the received Fig. 3 contains timing diagrams to explain the

nen message or synchronization signal steps synchronization process taking into account the

test switch means can be provided by the invention.

For the following considerations, it is the equal-current integral for each received step Valid over the entire step duration or over 65, whether the telegraphing steps shown are a form part of the step duration and each step belong to a single telegraphic message, or whether they belong to consider as unsafe whose voltage or current messages belong to different ones, their steps integral falls below a defined value. or combinations of steps as a result of the application of the

You can do this e.g. B. by means of a capacitor.

real who follow the whole step duration or 70.

The received telegraph characters present at the input terminal α (Fig. 1) in the form of a modulated carrier frequency voltage are amplified in the demodulating device E and converted into direct current characters with the step sequence frequency /, so that at the output of the demodulating device E, for example, the in Fig. 2, Line 1, have the shape shown. The transient processes that are generally unavoidable on the transmission path lead to the flattening of the step edges, which are shown as linear for the sake of simplicity. The points in time at which the step inserts are to take place in synchronism with the correct phase with respect to the sampling phase with interference-free reception are denoted by i1 to i6.

The DC signals emitted by the demodulating device E (FIG. 1) are fed to the differentiating circuit Dl, among other things. B. in the positive direction. The pulses formed in this way are shown in FIG. 2, line 2, and are used as synchronization signals in the following.

The highly constant, quartz-controlled oscillator G (Fig. 1) supplies the control frequency nf. This is divided down to the frequency / by means of the frequency divider Tl and fed via the switching contact u 1 to the differentiating and amplifier unit D 2, which generates a clock pulse with the pulse repetition frequency / forms for controlling the transmission device (not shown) to be connected to the output terminal b, for example a multiplex transmission distributor. In the frequency dividers T 2, T 4 and T 5 , the frequency nf of the control oscillator as a whole is also divided down to the frequency /; the differentiating and amplifier unit D 3 forms a suitable clock pulse from this to control the circulation of the receiving device to be connected to the output terminal c , e.g. B. a multiplex reception distributor. Since the reception synchronization device, as will be explained in more detail later, acts on the frequency divider T 2, the clock pulses emitted by the differentiating and amplifier units D 2 and DZ are not phase-locked to one another. In a corrected station, however, the transmitting and receiving devices should be connected to one another in a phase-locked manner after the adjustment process; this is achieved by flipping the changeover contact ul .

From the output of the frequency divider Γ 2, which divides the frequency nf down to the frequency 4 /, a voltage is sent via the phase shifter Ph to the frequency divider TZ , which emits a square-wave alternating voltage that has the same frequency 2f as the output of the frequency divider T 4 but has been brought into a different phase relationship to the synchronizing pulses by the phase shifter Ph and is shown in FIG. 2, line 3. The detailed representation of the synchronization device is dispensed with in FIG. 1. A substantial part of the synchronization device is combined in the phase comparison device PV (FIG. 1). These are on the one hand the synchronization pulses (Fig. 2, line 2) emitted by the differentiating circuit Dl via the coincidence gate G1 (AND circuit), which can initially be viewed as continuously permeable, and on the other hand the square-wave voltage of frequency 2 / emitted by the frequency divider TZ (Fig. 2, line 3) supplied. The synchronization process is as follows:

The synchronization pulse (FIG. 2, line 2) occurring, for example, at time 11 briefly closes a preferably electronic switch (not shown), ie from time il 'to time 11 ", and thus sets the square-wave alternating voltage output by frequency divider TZ (FIG. 2, line 3) via an unillustrated resistor R to a likewise not shown capacitor C. Since the voltage of the frequency divider T3 at the time is il 'is negative, the capacitor C starts a negative charge; approximately after half the closing time of the switch proposes the square wave voltage in the positive direction. landing current of the capacitor C is now flowing in the opposite direction when the capacitor C for the duration of a synchronizing pulse, ie during the closing time of the switch, is equal to loading long negative and positive, then the residual charge at the end of closing time, ie at time ti, just zero again.

If the synchronization pulses come z. B. too early in a continuous sequence, each leaves a negative residual charge on the capacitor; the remaining charges add up gradually, and when the charge of the capacitor C has reached a certain value, a device responds which influences the frequency divider T 2 in such a way that a division jump takes place more than normal; at the same time, the capacitor C is discharged again by a short circuit via a further, preferably electronic switch. Since the additional division jump takes place at the high frequency nf , it only has a single small phase jump with respect to the frequency f

the size - result. In relation to the comparison frequency 2 f output by the frequency divider T 3, the phase jump angle is indeed twice as large, but in terms of time it is the same small amount. In order to remove a noticeable phase error, the process must generally be repeated several times.

If the station is already corrected, in which the changeover contact u 1 is switched and the contacts μ 2 and u 3 are closed at the same time, one of the two magnets of the stepping mechanism 5 ".S" is excited at the same time as the additional pitch jump is initiated which acts on a latch to a gear and driven via a reduction gear pulling capacitor Cl of the control quartz oscillator in the control G rotated by a very small amount in the sense of an increase of the control frequency.

In Fig. 2, the first three step inserts are undistorted and drawn in the correct phase position. The fourth step start (time i4) has no effect, because in the selected example two positive steps follow one another and consequently no step edge occurs. The fifth step start comes too early compared to the target time £ 5, and the sixth step start comes too late compared to the target time f6. Thus, the aforementioned charging capacitor C increases throughout the duration of the derived sync pulse, that is, between the time points 1 5 'and £ 5 ", negative charge. However, this is the duration of the delay following synchronizing pulse, that is, between the time points £ 6' and i6 ", canceled by a positive charge. This is not a real phase error, just one with telegraphy ^

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distorted character. Given about the two. If an automatic error correction

Step inserts averaged no remaining charge on which is provided will generally be a false one

Capacitor C remains, therefore no correct characters are recognized either; the error is then

of synchronism. retrieval of the disturbed character due to automatic

In Fig. 3, line 1 shows the same sequence of steps as 5 query at the sender removed.

Line 1 in Fig. 2. However, it has been assumed here that the discharge pulses of the capacitor C 2 are temporarily rectified as a result of a disturbance and that the step between times 1 3 and i4, which is also positive with the help of the rectifier arrangement Gr 1, and the likewise bistable Kippin negative polarity changes. As line 2 in circuit K 2 supplied. Furthermore, with the aid of FIG. 3, this disturbance gives rise to two differentiating circuits £> 4 from the synchronizing pulses that are fundamental to the frequency, but incorrect. This divider Γ 4 emitted square wave voltage impulses that the capacitor C in the phase forms the negative suppressed and the positive comparator PV (Fig. 1) additional positive tive (Fig. 3, line 7) also fed to the flip-flop circuit K 2 charges (cf. line 3 in FIG. 3). The flip-flop circuit K 2 will thus cause the phase correction to respond more than once from the pulses of lines 5 and 7 (Fig. 3) in the event of an accumulation of such disturbances and thereby controls and toggles alternately into one position, thus also causing the frequency adjustment or another position (Fig . 3, line 8). If the size can be sufficient, as a result of which the in-phase DC of a pulse of line 5 is sufficient, then the reception device is not disturbed. The one such tilting process.

flow of such false synchronizing pulses is through 20 two outputs of the flip-flop K2, the one

the measures explained below are avoided: voltage running in the opposite direction are to be avoided via the coincidence

From the output of the frequency divider T 4 (Fig. 1), the gates G 2 and G 3 are connected to the inputs of a square wave voltage of frequency 2 / (single-stable multivibrator K 3. The two currents) are branched off (line 4 in Fig. 3) . This serves gates are also supplied pulses, inter alia, for controlling the two preferably 25 by means of the differentiation circuit D 5 from the Auselektrischen switches Sl and S2. The switch Sl output voltage (Fig. 3, line 3) of the frequency divider 3 is T, for example, respectively derived at a time overall. The rectifier Gr 3 ensures that, by 25% of the time of a step duration, only the positive pulses (Fig. 3, line 9) on the received signals (Fig. 3, line 1) are later than the gates. In normal operation, ie at the set point in time ti to i6 of each step, good reception is always used at the pulse times, and switch S 2 is opened at the same time. just the gate G 3 by the by the toggle The closing time of the switch S1 is in the upstream voltage output K2 transparent lying example half a step duration, it ends controls. The toggle switch K 3 is thus held in its 25% of the time of a step duration before the rest position. However, it is the set point in time of the next step in step K2 in flip-flop. 35 a tilting process as a result of a reception disturbance - as long as the switch S1 is closed, a fall flows, so at the time of the next current from the demodulating device E via the pulse, the gate G 2 permeable and the gate G 3 resistor Rl in the capacitor C2 and loads locked (approximately in the middle of line 8 in Fig. 3). this depending on the polarity of the Si just received. Thus, the trigger circuit K 3 is positive or negative in this eye signal. Respond to this view (Fig. 3, line 10). If, in the meantime, the received signal steps are not received in any further disturbed signal step, the middle area of their duration is sampled integrally at the time of the next following pulse (hatched areas in FIG. 3, line 1). The on again the gate G 3 permeable, whereby the toggle catch and end area of the telegraphing steps (in the circuit KZ back to its rest position each a quarter of the target step 45 toggles. The toggle circuit K 3 delivers after continuous) is not evaluated Because these areas are falsified every uncertainly received signal step via the telegraphic distortion borrowed preferably by the unavoidable rectifier Gr4 and the resistor R2, which are only disturbing here. Current in capacitor C3; this takes

After the end of the sampling time, the opens only a small charge, which, if the Emp switch Sl. At this moment, the 50 fang is continuously good, closes via the high-resistance switch S2 and discharges the capacitor C2. The stand R 3 slowly drains off again. If the discharge pulse is very frequent (Fig. 3, line 5), if there are sufficient or continuously unsafe signal steps received, the size of the bistable flip-flop circuit / Cl adds up to the charge on the capacitor C. 3 Has reached height, brings (Fig. 3, line 6). Since between the times ί 3 55 the charging voltage amplified in amplifier A and £ 4 received telegraphing step as a result of the relay AR to respond, whose contact ar so on disturbance is not clear in its polarity and he the phase comparison device PV or another when scanning If only a small residual charge acts on the synchronization device on the spot that has left the capacitor C 2, the charging pulse (Fig. 3, line 5) is so small that it does not turn 60. For example, the phase comparison switching of the flip-flop Kl can be sufficient. The already mentioned but not output of the flip-flop circuit K1 contained in the alignment device PV is therefore not connected to the voltage, which is correctly polarized for the capacitor C shown, via the contact ar short this telegraphing step. Of course, the relay that is, the Telegrafierzeichen AR is received as uncertain also be implemented as an electronic relay, characterized. 65 By means of the described method and the output of the flip-flop circuit / C1, the written circuit arrangement is thus newly formed, but under (Fig. 3, line 6) via terminal d to the reception graphics transmission systems if the receiving device is severely disturbed, e.g. B. to a multiplex distributor, further 70 catch, achieved in a reliable manner.

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In a further embodiment of the invention, however, an additional improvement can be achieved with little means: It has already been mentioned that the gate Gl is switched on between the differentiating circuit Dl, which derives the synchronization pulses from the received signals, and the phase comparison device PV. This gate Gl is controlled by a rectangular voltage which is taken from the output of the frequency divider T 4, but which is opposite to that emitted also from the frequency divider T 4 square-wave voltage of the line 4 in Fig. 3. The gate Gl is thus about 25% the time of a step duration before the point in time at which a synchronization pulse is to be expected with distortion-free reception, and blocked again by about 25% of the time of a step duration after this point in time. In this way, all synchronization pulses that arise when the telegraphic distortion exceeds the amount of 25% have no influence on the synchronization process, so they cannot cause any harmful changes in synchronization. The limited evaluation of the synchronization pulses when adjusting the synchronization is expediently temporarily eliminated before the start of operation.

Claims (10)

PATENT CLAIMS: 1. Procedure for maintaining phase-correct synchronization in synchronous telegraphy transmission systems, especially in radio teleprinter systems, with severely disturbed reception, the with the aid of the message signal steps transmitted with the message or on the receiver side derived synchronization signals are synchronized, characterized in that the received Telegraph characters are monitored for their transmission security and that when detected The synchronization process is automatically prevented by too frequent transmission errors. 2. Circuit arrangement for implementing the method according to claim 1, characterized in that test and evaluation switching means (C 2, CS) are provided, which check the received message or synchronization signal steps for their security and, in the event of an accumulation of uncertainly received steps, the response of the synchronization device impede. 3. Circuit arrangement according to claim 2, characterized in that test switching means (C 2) are provided, the voltage of each received message or synchronization signal step or the current integral over the entire step duration or over part of the step duration and evaluate each step as unsafe, its voltage or current integral one falls below the defined value. 4. Circuit arrangement according to claim 3, characterized in that each at the end the charging state of one of the voltage or current integral of the received Message or synchronizing signal steps forming, each during a fixed Duration of the chargeable capacitor (C 2) as a measure of the safety or uncertainty of the relevant telegraphing step is used. 5. Circuit arrangement according to claim 4, characterized in that evaluation switching means (K2) are provided, which the amount of the size of the discharge pulse resulting from the discharge of the capacitor (C2) charged according to the step security at the end of the charging time as a measure of the security or uncertainty of the relevant step evaluate whether it is sufficient or not sufficient, a switching device (K2) controlled therewith, ζ. B. an electromechanical relay or an electronic flip-flop to respond, and that feedback switching means (D 4, Gr 2) are provided, which automatically return the said switching device after a certain time by additional control or by automatic delayed tilting back into the starting position. 6. Circuit arrangement according to claim 5, characterized in that a further switching device (KS) is provided which responds and emits a current or voltage step at its output when the switching device (K2) mentioned in claim 5 responds as a result of an uncertainly received synchronizer - or message signal step has not occurred, and which is also automatically or automatically returned to its rest position after a certain time. 7. Circuit arrangement according to claim 6, characterized in that a capacitor (C 3) with a discharge resistor (RS) is provided which determines the frequency of the current or voltage steps indicating an uncertainly received message or synchronization signal step and whose time constant is dimensioned so that only when a certain frequency of the mentioned current or voltage steps is exceeded does a cumulative charge for the temporary response of a switching device (AR) arise and that this switching device (AR ) intervenes in the synchronizing device (PV) in such a way that a synchronization process occurs during the response time of the switching device (AR) is omitted. 8. A circuit arrangement according to claim 1, characterized in that control switching means (SS) are provided which, in times of good reception with accumulation of phase corrections in one direction, align the frequency of the receiver control oscillator with that of the transmitter control oscillator, in that at each Correction step the frequency-determining elements of the receiver control oscillator, z. B. the pull capacitor of the control crystal (Cl) can be adjusted by a very small amount in a corresponding manner, so that if the synchronization process is prevented during times of poor reception, the synchronization between the transmitting and receiving device is not affected by differences in the control frequencies. 9. The method according to claim 1, characterized in that synchronization characters, which from the Step envelopes are derived from received signal steps, only for synchronization used if they result from signal steps, their telegraphic distortion a certain percentage, e.g. B. + 25%, does not exceed. 10. Circuit arrangement for implementing the method according to claim 9, characterized in that that a coincidence gate (C-I) is provided, which only during a certain time 009 547/161 space within the target step duration of the received. Signal steps is controlled permeable, so that only synchronization signals are effective which are derived from signal steps whose step reversals take place in the period in which the coincidence gate (Gl) is controlled to be permeable is. Considered publications: German patent specification No. 963 785. 1 sheet of drawings ® 009 547/161 6. 60