GB9000360D0 - Method of reducing hot-electron degradation in semiconductor devices - Google Patents

Method of reducing hot-electron degradation in semiconductor devices

Info

Publication number
GB9000360D0
GB9000360D0 GB909000360A GB9000360A GB9000360D0 GB 9000360 D0 GB9000360 D0 GB 9000360D0 GB 909000360 A GB909000360 A GB 909000360A GB 9000360 A GB9000360 A GB 9000360A GB 9000360 D0 GB9000360 D0 GB 9000360D0
Authority
GB
United Kingdom
Prior art keywords
semiconductor devices
reducing hot
electron degradation
degradation
electron
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB909000360A
Other versions
GB2229575B (en
GB2229575A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB9000360D0 publication Critical patent/GB9000360D0/en
Publication of GB2229575A publication Critical patent/GB2229575A/en
Application granted granted Critical
Publication of GB2229575B publication Critical patent/GB2229575B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Junction Field-Effect Transistors (AREA)
GB9000360A 1989-03-22 1990-01-08 Method of reducing hot-electron degradation in semiconductor devices Expired - Lifetime GB2229575B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US32730289A 1989-03-22 1989-03-22

Publications (3)

Publication Number Publication Date
GB9000360D0 true GB9000360D0 (en) 1990-03-07
GB2229575A GB2229575A (en) 1990-09-26
GB2229575B GB2229575B (en) 1993-05-12

Family

ID=23276001

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9000360A Expired - Lifetime GB2229575B (en) 1989-03-22 1990-01-08 Method of reducing hot-electron degradation in semiconductor devices

Country Status (6)

Country Link
JP (1) JPH02281663A (en)
DE (1) DE4007895C2 (en)
FR (1) FR2644934A1 (en)
GB (1) GB2229575B (en)
HK (1) HK1000976A1 (en)
IT (1) IT1239459B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960015322B1 (en) * 1993-07-23 1996-11-07 현대전자산업 주식회사 Method for manufacturing semiconductor elements
JP2003297956A (en) 2002-04-04 2003-10-17 Toshiba Corp Semiconductor storage device and its manufacturing method
JP4212299B2 (en) 2002-05-09 2009-01-21 株式会社東芝 Nonvolatile semiconductor memory device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3879746A (en) * 1972-05-30 1975-04-22 Bell Telephone Labor Inc Gate metallization structure
US4288256A (en) * 1977-12-23 1981-09-08 International Business Machines Corporation Method of making FET containing stacked gates
JPS56501028A (en) * 1979-08-13 1981-07-23
JP2515715B2 (en) * 1984-02-24 1996-07-10 株式会社日立製作所 Method for manufacturing semiconductor integrated circuit device
US4566026A (en) * 1984-04-25 1986-01-21 Honeywell Inc. Integrated circuit bimetal layer
US4743564A (en) * 1984-12-28 1988-05-10 Kabushiki Kaisha Toshiba Method for manufacturing a complementary MOS type semiconductor device
JPS62143476A (en) * 1985-12-18 1987-06-26 Fujitsu Ltd Semiconductor storage device
US4707721A (en) * 1986-02-20 1987-11-17 Texas Instruments Incorporated Passivated dual dielectric gate system and method for fabricating same
IT1201840B (en) * 1986-08-28 1989-02-02 Sgs Microelettronica Spa METHOD-SEMICONDUCTOR OHMIC CONTACTS PROCEDURE
CA1306072C (en) * 1987-03-30 1992-08-04 John E. Cronin Refractory metal - titanium nitride conductive structures and processes for forming the same
US4824803A (en) * 1987-06-22 1989-04-25 Standard Microsystems Corporation Multilayer metallization method for integrated circuits

Also Published As

Publication number Publication date
IT9019716A1 (en) 1991-09-19
GB2229575B (en) 1993-05-12
IT9019716A0 (en) 1990-03-19
DE4007895C2 (en) 2000-03-30
JPH02281663A (en) 1990-11-19
IT1239459B (en) 1993-11-02
GB2229575A (en) 1990-09-26
FR2644934A1 (en) 1990-09-28
HK1000976A1 (en) 1998-05-15
DE4007895A1 (en) 1990-09-27

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20100107