GB894654A - Improvements in or relating to transfer circuits using saturable magnetic cores - Google Patents

Abstract

894,654. Circuits employing bi-stable magnetic elements. STANDARD TELEPHONES & CABLES. Jan. 8, 1959, No. 723/59. Class 40 (9). [Also in Groups XIX and XL (c)] A magnetic core counter which may be used as a time-division multiplex distributer switch comprises, as shown in Fig. 1, four cores 1-4 each with five windings 5-9 and associated switching transistors 20, 21, transfer transistors 10-13 and output transistors 24-27. Switch 22 is first closed to magnetize the cores in the directions indicated (oblique lines are used to indicate the effects of currents through the windings) and when released clock pulses from 17 appearing alternately on lines 18 and 19 reset core 1 when 21 energizes line 63, and the output signal from winding 5 causes transistor 11 to set 2 through winding 6 and transistor 25 momentarily conducts to provide a switching output at 30, 31. The next clock pulse on line 18 resets 2 and sets 3 to close transistor switch 26, and so on; resetting of 4 setting 1 by means of transistor 10. Fig. 4 (not shown) illustrates a modification in which core 4, and transistors 13 and 27 are omitted, core 1 being set by the first clock pulse after core 3 is reset by a " set " winding in line 62 (the " set " winding having fewer turns than windings 7, or a bias winding for core 1 being provided, to prevent its being set if core 2 is being reset) and an output transistor circuit responsive to this setting being provided. Fig. 5 shows part of a distributer using two sets of 24 cores each, 43A, 44A, 45A, . . . and 43B, 44B, 45B,... and output windings suitable for switching 24 speech channels and 48 supervising channels of a multiplex system. A binary counter 48 synchronized with the clock pulse source 17 of Fig. 1 blocks the A cores and the B cores in successive counting cycles so that in one cycle the " SIG. 1" and " SPEECH " outputs, and in the next the " SIG. 2 " and " SPEECH " outputs are pulsed. Fig. 6 illustrates a circuit for the clock pulse source 17 in which an alternating input to transformer 51 is applied to push-pull transistors 49 and 50 directly coupled to a further push-pull pair of transistors 52, 53. The collector currents of 52 and 53 alternately switch a magnetic core 57 to its two saturated states thus providing output pulses at 18 and 19 alternately. Reference has been directed by the Comptroller to Specification 841,287.