GB8319704D0 - Data memory arrangement - Google Patents

Data memory arrangement

Info

Publication number
GB8319704D0
GB8319704D0 GB838319704A GB8319704A GB8319704D0 GB 8319704 D0 GB8319704 D0 GB 8319704D0 GB 838319704 A GB838319704 A GB 838319704A GB 8319704 A GB8319704 A GB 8319704A GB 8319704 D0 GB8319704 D0 GB 8319704D0
Authority
GB
United Kingdom
Prior art keywords
data memory
memory arrangement
arrangement
data
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB838319704A
Other versions
GB2123998A (en
GB2123998B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Allard Way Holdings Ltd
Original Assignee
Marconi Avionics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Avionics Ltd filed Critical Marconi Avionics Ltd
Priority to GB08319704A priority Critical patent/GB2123998B/en
Publication of GB8319704D0 publication Critical patent/GB8319704D0/en
Publication of GB2123998A publication Critical patent/GB2123998A/en
Application granted granted Critical
Publication of GB2123998B publication Critical patent/GB2123998B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
GB08319704A 1982-07-21 1983-07-21 Data memory arrangment Expired GB2123998B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08319704A GB2123998B (en) 1982-07-21 1983-07-21 Data memory arrangment

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8221130 1982-07-21
GB08319704A GB2123998B (en) 1982-07-21 1983-07-21 Data memory arrangment

Publications (3)

Publication Number Publication Date
GB8319704D0 true GB8319704D0 (en) 1983-08-24
GB2123998A GB2123998A (en) 1984-02-08
GB2123998B GB2123998B (en) 1986-10-22

Family

ID=26283402

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08319704A Expired GB2123998B (en) 1982-07-21 1983-07-21 Data memory arrangment

Country Status (1)

Country Link
GB (1) GB2123998B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2164767B (en) * 1984-09-25 1988-08-24 Sony Corp Video data storage
FR2583539B1 (en) * 1984-12-31 1991-05-24 Lehmann Jean Philippe METHOD OF CONSTRUCTING DEVICES FOR THE SIMULTANEOUS ACTIVATION OF CONTROL TRAINS AND APPLICATIONS TO MEMORIES.
EP0255280A3 (en) * 1986-07-24 1990-10-24 Gec Avionics Limited Data storage
GB2206984B (en) * 1987-07-14 1992-01-15 Sony Corp Methods of and apparatus for storing digital video signals
WO1993009491A1 (en) * 1991-11-08 1993-05-13 Commonwealth Of Australia An address generator
US8259135B2 (en) * 2006-07-13 2012-09-04 Intel Corporation Rotated rendering and locking support for tablet computers and portrait displays
EP2399258B1 (en) 2009-02-20 2016-04-06 Intel Corporation Multimode accessible storage facility

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1543788A (en) * 1966-12-28 Ibm Multi-word multidirectional random access memory system
US3800289A (en) * 1972-05-15 1974-03-26 Goodyear Aerospace Corp Multi-dimensional access solid state memory
US3938102A (en) * 1974-08-19 1976-02-10 International Business Machines Corporation Method and apparatus for accessing horizontal sequences and rectangular sub-arrays from an array stored in a modified word organized random access memory system
US4051551A (en) * 1976-05-03 1977-09-27 Burroughs Corporation Multidimensional parallel access computer memory system
US4069970A (en) * 1976-06-24 1978-01-24 Bell Telephone Laboratories, Incorporated Data access circuit for a memory array

Also Published As

Publication number Publication date
GB2123998A (en) 1984-02-08
GB2123998B (en) 1986-10-22

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee