GB639719A - Improvements relating to circuits for providing recurrent impulses - Google Patents

Abstract

639,719. Pulse delaying circuits. HIGHAM, E. H., and METROPOLITAN - VICKERS ELECTRICAL CO., Ltd. March 17, 1947, No. 7331. [Class 40 (vi)] Apparatus for providing a train of pulses, the recurrence frequency of which is a submultiple of that of a standard frequency source and having an adjustable delay relative to fixed time instants of the same recurrence frequency, comprises two or more delay circuits which are adjustable over ranges which are integrally related, the delay circuits being tripped sequentially after initiation by a pulse from the standard source. Fig. 1 shows in block schematic form a delay system in which impulses derived from the standard frequency source MO pass through the Divider Gate at a frequency which is submultiple of that of the standard source and which is determined by the setting of the dividing-down circuit CD. The output pulses from the Short Delay Selector have a delay relative to the output pulses of the divider gate which is determined by the settings of the long, intermediate and short delay selectors which operate to give delay periods each of which is an integral number of tenths of the period of the preceding delay circuit as determined by the decade dividing circuits 1, 2 and 3. The decade dividers may comprise conventional synchronized blocking oscillator circuits, Fig. 3 (not shown). Fig. 4 and 5 show a time base and delay selector circuit. Incoming positive going pulses from the divider gate or preceding delay selector circuit are applied at terminal IN to render valve V2 conducting, the negative going pulse at its anode which is applied via C to the grid of V4 and the common cathode resistor causing valve V4 to be rapidly cut-off and to produce a positive pulse at its anode which has a duration determined by the time constant CR. This pulse is D.C. restored by diode D2 and applied to a Miller integrator valve V5 to generate a sawtooth waveform at terminal OUT which is applied to the strobing and gating circuit comprising valves V6, V7. This operates as described in Specification 639,722 to produce a signal at its output which is synchronized to some specific pulse applied from the decade divider to terminal DEC, the actual synchronizing pulse selected being dependent on the setting of potentiometer R3. The output from the long and intermediate delay selectors is used to trip the succeeding time base and in the case of the last or short delay selector may be used to trip a gating circuit to let through a pulse to the output from the standard frequency impulse source. Alternatively the output signal may be taken from the short delay selector.