GB2619572A

GB2619572A - Solid state circuit breaker

Info

Publication number: GB2619572A
Application number: GB2217302.5A
Authority: GB
Inventors: Purkayastha Saurabh; Nitkin Dmitry; Bialy Tomaszl
Original assignee: Eaton Intelligent Power Ltd
Current assignee: Eaton Intelligent Power Ltd
Priority date: 2022-06-08
Filing date: 2022-11-18
Publication date: 2023-12-13
Also published as: GB202217302D0

Abstract

The solid-state circuit breaker comprises a first and second power switch groups 107, 108, each comprising at least one transistor, preferably four in parallel, and at least one driving circuit per group configured to control the transistors. The transistor groups connect to one of a pair of arms 111, 112 of a common conductive element, the arms disposed symmetrically with respect to a plane of symmetry. There is a symmetric connection portion between the arms 113. In use the the arms may be adjacent with opposing current flow. Preferably the transistor group connects to one of a pair of input/output terminals 102, 103 via busbars 105, 106. The common conductive element, busbars, terminals and transistors are carried on a, preferably planar, PCB, perpendicular to the plane of symmetry. The common element maybe on one face of the PCB, with busbars on the opposite face. The transistor groups each connect the terminals together via the common element to form a power-loop (preferably including busbars) and can be commanded by the driving circuits to prevent current flow between the terminals in an overcurrent condition. When viewing the breaker circuitry in plan view (parallel to the PCB and perpendicular to the symmetry plane), the driving circuits do not overlap with at least the conductive element, and preferably do not overlay with any of the power loop. Low-voltage driver circuitry may be partly carried on a parallel mezzanine PCB (120 figure 2). The transistors may be each fixed to a common heatsink (figures 2, 5a ,b, 6). Preferably the symmetric layout provides similar low resistance paths/branches (eg dotted and dashed lines) for various transistor pairs to more evenly distribute current and thus heating. The layout is compact.

Description

Solid-State Circuit Breaker

Field

This relates to a solid-state circuit breaker for preventing damage to electrical 5 components or injury to users in an overcurrent condition.

Background

Solid-state circuit breakers comprising semiconductor-based power switches are known to suffer significant conduction power losses during normal operation. Heat power is ll.) dissipated in the semiconductor power switches and in the printed circuit board (PCB) which accommodates the power switches and provides a current path between a power source and a load. This heat power dissipation (or power loss) is known to cause overheating in solid-state circuit breaker devices.

/.5 One approach for reducing the amount of heat dissipated in solid-state circuit breaker devices is to decrease the effective resistance of the power switches and of the PCB. Previous attempts to reduce the effective resistance of solid-state circuit breakers have resulted in several significant limitations, including undesirable increases in the size of devices. For smaller devices, interactions between various electrical components of the device in overcurrent situations can lead to reduced reliability of the circuit breaking mechanism an overcurrent condition.

It is desirable to provide a solid-state circuit breaker that can overcome the disadvantages with known solid-state circuit breakers.

Summary

In a first aspect, a device is provided in the appended independent apparatus claim, with optional features defined in the dependent claims appended thereto.

Described herein is a solid-state circuit breaker. The solid state circuit breaker comprises a first power switch group and a second power switch group, each power switch group comprising at least one transistor and at least one driving circuit configured to control the at least one transistor; a conductive element comprising first and second arms disposed symmetrically with respect to a plane of symmetry and a connection portion connecting the first and second arms to each other. The first and second power switch groups are disposed symmetrically with respect to the plane of symmetry. The first power switch group is configured to provide a first current path between an input and the first arm of the conductive element when switched on, and the second power switch group is configured to provide a second current path between the second arm of the conductive element and an output when switched on, the first and second current paths forming part of a power loop from the input to the output via the conductive element and the transistors of the first and second power switch groups. The at least one driving circuit of each power switch group does not overlap with the conductive element when viewed in a plan view. In this way, electromagnetic /o interference can be reduced within the circuit breaker, whilst also reducing noise coupling between the power loop and the driving circuits during a high current interruption transient event. An improved circuit breaker may therefore be provided.

In some examples, the first current path comprises a first connection busbar that is electrically connected to the input and the second current path comprises a second connection busbar that is electrically connected to the output, wherein the first connection busbar is electrically connected to the first arm of the conductive element via the first power switch group and wherein the second connection busbar is electrically connected to the second arm of the conductive element via the second power switch group.

In some examples, the first and second power switch groups each have the same number of transistors.

or In some examples, the first power switch group comprises a plurality of transistors arranged in parallel to provide the first current path; and wherein the second power switch group comprises a plurality of transistors arranged in parallel to provide the second current path.

In some examples, the total resistance along a path between the input and the output is the same for all branches of the power loop. In other words, regardless of which branch or path the current follows around the power loop, the total resistance is the same. This facilitates a uniform current in each branch, helping to avoid overheating of the device.

In some examples, the total trace length from the input to the output via a transistor of the first power switch group and a transistor of the second power switch group is the -3 -same for all combinations of transistors in the first and second power switch groups. In other words, regardless of which branch or path the current follows around the power loop (regardless of which specific combination of transistors from the first and second power switch groups the current flows through), the trace length of that branch/path is the same as each other branch/path. This facilitates a uniform resistance along each branch or path, helping to avoid overheating of the device.

In some examples, the transistors of the first power switch group and the second power switch group are disposed symmetrically with respect to the plane of symmetry.

In some examples, the first and second power switch groups each comprise four transistors.

In some examples, the conductive element and the first and second connection busbars 15 are formed of copper.

In some examples, the solid-state circuit breaker further comprises at least one clamping device having first and second damping members, the first clamping member being disposed on top of the conductive element and the second clamping member being disposed beneath the first and second connection busbars. The first and second clamping members may be biased towards each other with a fastener.

In some examples, the solid-state circuit breaker comprises a printed circuit board, PCB. The conductive element may be disposed on an upper surface of the PCB and the first and second connection busbars may be disposed on a lower surface of the PCB.

In some examples, a part of the driving circuits of each of the power switch groups are disposed on a peripheral portion of the PCB. A peripheral portion of the PCB is the portion peripheral to a region in which the power loop is formed. By avoiding overlap between the driving circuits and the power loop in this way, electrical/electromagnetic interference can be reduced.

In some examples, the solid-state circuit breaker comprises a heat sink disposed beneath the PCB. The transistors of the first and second power switch groups may be 35 mechanically fastened to the heat sink. -4 -

In some examples, the transistors of the first and second power switch group are each provided as part of a discrete transistor package disposed on the underside of the PCB.

In some examples, each of the discrete transistor packages has a hole formed therethrough, and the discrete transistor packages are fastened to the heat sink using a transistor fastener that passes through a hole in the heat sink and the hole in the discrete transistor package and attaches to a transistor clamp disposed on the upper side of the discrete transistor package.

/o In some examples, the first transistor group comprises a plurality of discrete transistor packages, and each discrete transistor package of the first transistor group is fastened using the same transistor clamp.

In some examples, the solid-state circuit breaker comprises a mezzanine circuit board comprising at least part of the driving circuits of each of the power switch groups.

In some examples, the driving circuits of each of the power switches are configured to control the transistors to prevent flow of current through the power loop in an overcurrent condition.

List of Figures The following description is with reference to the following Figures.

Figure 1 illustrates an exploded view of a solid-state circuit breaker; or Figure 2 illustrates an exploded view of the solid-state circuit breaker of Figure 1 from a different perspective; Figure 3 shows a schematic illustration of elements of the solid-state circuit breaker of Figures 1 and 2 in a plan view; Figure 4 shows a schematic circuit diagram representing current paths through the solid-state circuit breaker of Figures iand 2.

Figure 5A shows part of the solid-state circuit breaker of Figures iand 2 in order to illustrate fastening aspects; and Figure 5B is a side view of a clamping device of the solid-state circuit breaker of Figures 1 and 2; Figure 6A is a cross sectional view of discrete transistor packages of a power switch group fastened to the heat sink in the solid-state circuit breaker of Figures 1 and 2, and 6B illustrates the heat sink of the solid-state circuit breaker of Figure 6A from below. -5 -

Detailed Description

With reference to Figure iand Figure 2, a solid-state circuit breaker 100 is described.

The term solid-state circuit breaker 100 refers to circuit breaker devices in which semiconductor components are used to control power and current flow, as opposed to the use of electromechanical circuit breaking components.

A printed circuit board 101, PCB, is coupled to a first (here termed an input) terminal 102 and a second (here termed an output) terminal 103. In this example, current flows /t) from first terminal 102 to second terminal 103. The first/input terminal 102 is configured to be connected to a power source and the second/output terminal 103 is configured to be connected to an external load. A conductive element llo is disposed on an upper surface of the PCB um, between the input terminal 102 and the output terminal 103, in order to form a part of a conductive path formed between the input 102 and the output 103. This circuit arrangement is just an example. It will be understood that in some examples, current flow may either be reversed or alternating (e.g. an AC current of 50-60Hz), such that current flows from second terminal 103 (now acting as an input terminal) to first terminal 102 (now acting as an output terminal).

The conductive element no is disposed at a central position of the PCB such that it is spaced apart from the edges of the printed circuit board in at least one direction. The upper surface of the PCB 101 may further comprise an integrated copper trace line that follows the path of the conductive element no and contacts the conductive element along its length. In the embodiments described herein, the conductive element no is a or copper busbar, though other electrically conductive materials can be used.

The conductive element no comprises a first arm in and a second arm 112 that are connected to each other by a connection portion 113. For example, the conductive element may be a (substantially) U-shaped busbar, in which the first and second arms are parallel to each other and the connection portion 113 joins the first and second arms at one end. The provision of a conductive element no mounted to surface of the PCB provides a low resistance path for current flow, which minimizes dissipative power losses during normal operation. When the first and second arms of the conductive element llo are parallel to each other and connected in the manner described, current flows in the first arm and second arm of the conductive element 110 in opposite directions during operation; as such, external magnetic fields caused by current flow in -6 -the arms of the conductive element no may be at least partially cancelled by each other. Preferably, the conductive element no is integrally formed and, preferably, the conductive element no is symmetrical with respect to an axis of symmetry (or a plane of symmetry perpendicular to the PCB). However, in other examples the first and second arms are not integral to one another, but are separate and connected by at least a separate connection portion 113 to form the conductive element no described herein.

A first connection busbar 105 and a second connection busbar io6 are disposed on the lower surface of the PCB 101. The first connection busbar 635 is electrically connected /o to the input terminal 102 and the second connection busbar 106 is electrically connected to the output terminal 103. The first and second connection busbars are not directly connected to each other or to the conductive element no. Preferably, the first and second connection busbars are formed of copper and, preferably, the first and second connection busbars are straight elements respectively disposed beneath the first and second arms of the conductive element no and separated from the first and second arms of the conductive element no by the PCB 101. The lower surface of the PCB may further comprise two integrated copper trace lines that respectively follow the first and second connection busbars and contact the respective copper busbars along their length.

The solid-state circuit breaker 100 further comprises a first power switch group 107 and a second power switch group 108. Each power switch group in the specific embodiments shown in Figure 1 comprises four transistors 109 mounted on a lower surface of the PCB 101. In other embodiments, a different number of transistors may be or included in the power switch groups. By using a greater number of transistors in each power switch group, the device can be made suitable for use with higher rated currents. Preferably, both power switch groups have the same number of transistors, and each power switch group includes more than one transistor. By using two groups of transistors in the manner claimed, the circuit breaker described herein can facilitate control of current in any direction of current flow direction (i.e. current flow from terminal 102 to 103, and/or current flow in the opposite direction from terminal 103 to 102). This allows for use of the circuit breaker in an AC power system, as well as in a DC power system.

The transistors 109 of the first power switch group Er are disposed symmetrically to the transistors 109 of the second power switch group 108 with respect to a plane of -7 -symmetry perpendicular to the PCB um. In other words, if the PCB um could be folded along an axis of symmetry (lying in the plane of symmetry), each transistor 109 of the first power switch group 107 would be brought into contact with a respective transistor 109 in the second power switch group 108. The plane of symmetry may be the same plane of symmetry with respect to which the conductive element no is symmetric. The symmetric arrangement of the transistors 109 and the conductive element 110 allows the current flow in the two halves of the transistor device to be symmetric, which may allow for self-cancelling of external magnetic fields generated by current flow during operation of the device. The transistors may be metal-oxide-semiconductor field-effect /0 transistors (MOSFETs), such as silicon carbide power switches, insulated-gate bipolar transistors (IGBTs) or another form of semiconductor-based switching device. In the example shown in Figure 1, the transistors 109 are provided in discrete transistor packages, such as TO-247 transistor packages.

The transistors 109 of the first power switch group 107 connect the first connection busbar 105 to the first arm in of the conductive element no in parallel. In other words, each of the transistors 109 of the first power switch group 107 connect the first connection busbar 105 to the first arm in of the conductive element 110, and the transistors are arranged in parallel. As such, the first connection busbar 105 and the transistors 109 of the first power switch group 107 form a first current path between the input 102 and the conductive element no when the transistors are switched on. The transistors may be directly connected to the 109 first connection busbar 105 and the first arm iio, or they may be connected to these elements via conductive traces in the PCB 101.

The transistors 109 of the second power switch group io8 connect the second connection busbar io6 to the second arm 112 of the conductive element no in parallel. In other words, each of the transistors 109 of the second power switch group 108 connect the second connection busbar 106 to the second arm 112 of the conductive element lio, and the transistors are arranged in parallel. As such, the second connection busbar 106 and the transistors 109 of the second power switch group 108 form a second current path between the conductive element no and the output 103 when the transistors 109 are switched on. The transistors may be directly connected to the 109 second connection busbar 106 and the second arm in, or they may be connected to these elements via conductive traces in the PCB. -8 -

The conductive element 110 is arranged to interconnect the source (or emitter) terminals of the transistors of the first group 107 with the source (or emitter) terminals of the transistors of the second group 108 (common source arrangement). However, the transistors may be arranged in any other arrangement to form a bi-directional switch, for example in common collector or bridge configuration. The transistors 109 of both power switch groups may comprise conductive traces that pass vertically through the PCB to allow the connection busbars on the lower surface of the PCB to be connected to the conductive element 110 on the upper surface of the PCB. When the transistors of the first and second power switch groups are switched on, a power loop Jo 304 is formed, wherein the power loop 304 is a continuous current path between the input 102 and the output 103. in this particular example, the entire current path between terminal 102 and 103 is defined via: the first connection busbar los, the transistors of the first power switch group 107, the conductive element 110, the transistors of the second power switch group 108 and the second connection busbar 106. in other examples, one or more other conductive elements may form part of the current path. Flow of current along the power loop 304 provides power to an external load from a power source during normal operation of the device. Turning off the transistors 109 of the first and second power switch groups can prevent the flow of current from the power source to the load when a transient owrcurrent condition is detected. A circuit breaker is therefore provided.

The plurality of parallel connections provided by the transistors between the first and second busbars and the conductive element provide a large number (equal to the square of the number of transistors in each power switch group) of distinct current or paths between the input 102 and the output 103. When there are four transistors in each power switch groups, as in the embodiments described here, there are sixteen possible current paths between the input and the output depending on which branches (or conductive traces) are followed in the first power switch group 107 and the second power switch group 108 (i.e. depending on which particular transistors the current flows through). By distributing these two groups of transistors across multiple parallel branches in the particular layout arrangement described herein with the conductive element tto, current distribution can be improved as compared to previous approaches. In this example, four parallel branches are used in a common source configuration, though it will be understood that any other number of transistors 109 may be provided in each power switch group, as discussed above. -9 -

In embodiments of the present invention, the total resistance along each path between the input and the output is substantially the same for all of the branches of the two power switch groups. For example, a path from the input to the output via a first transistor of the first power switch group and a first transistor of the second power switch group has the same total resistance as a path from the input to the output via a second transistor of the first power switch group and a second transistor of the second power switch group. Preferably, this is true regardless of which transistor of the first and second power switch groups are described as the first and second transistors. In other words, the total resistance along any path from the input to the output is the /o same, regardless of which transistors are included in the path. in some embodiments, the total trace length of each conductive path from the input to the output is the same for all paths between the input and the output. This causes the current passing through each transistor to be approximately equal during operation. As the amount of heat dissipated by a transistor is proportional to the RMS current passing through the transistor, providing equal currents through each transistor can minimize the total amount of heat dissipated for a given total current flow rate by avoiding high currents in any one transistor.

The circuit breaker described herein can achieve these advantages in a more compact arrangement than previous approaches by way of the U-shaped conductive element no. In particular, the arrangement described herein allows the first and second terminals and associated circuitry to be positioned along one edge of a PCB (as compared to previous approaches, which position the terminals in opposite corners of the PCB), facilitating provision of a smaller, less complex circuit breaker. -0or

The first and second power switch groups each comprise at least one driving circuit that controls the transistors 109 of the respective power switch group. In particular, the driving circuits are low-voltage circuits configured to control the gates of each transistor 109 to allow current to flow from a source to a drain of the transistor when switched on and to prevent the flow of current when switched off. The driving circuits are configured to switch off the transistors during a high current transient event. Tn the embodiment shown in Figure 1, each driving circuit controls the gates of two transistors 109. As such, two driving circuits are provided for each of the power switch groups. In other embodiments, a different number of driving circuits may be provided in each power switch group.

-10 -A mezzanine circuit board 120 is disposed above the PCB 101. Each driving circuit comprises a primary driver circuit with an auxiliary power supply located on the mezzanine circuit board 120. The primary driving circuit is disposed at a peripheral portion of the mezzanine circuit board 120 that is laterally displaced from the centre of the mezzanine circuit board 120 such that, when viewed in a plan view (i.e., from a direction perpendicular to the plane of the mezzanine circuit board 120), the primary driving circuit does not overlap any part of the power loop formed by the input terminal 102, the output terminal 103, the first and second connection bars, the conductive element 110 and the sourced and drains of the transistors tog. In other words, a peripheral portion of the PCB is the portion peripheral to a region in which the power loop is formed (when assembled and viewed in a plan view).

Each driving circuit further comprises a secondary driving circuit located on the PCB tot. The secondary driving circuit is disposed at a peripheral portion of the PCB tot that is laterally displaced from the first and second connection busbars and the conductive element no mounted to the PCB. The peripheral portion of the PCB tot may be disposed beneath the peripheral portion of the mezzanine circuit board 120 such that, when viewed in a plan view (i.e., from a direction perpendicular to the planes of the mezzanine circuit board 120 and the PCB tot), the peripheral portions of the mezzanine circuit boards 120 and the PCB tot at least partially overlap and do not overlap with the power loop. In other words, a peripheral portion of the PCB 101 is the portion peripheral to a region in which the power loop is formed. This arrangement reduces the noise coupling between the power loop and the driving circuits during a high current interruption transient event. In some embodiments, a housing or cover 160 at least partially surrounds the above described elements of the solid-state circuit breaker too.

The solid-state circuit breaker device too further comprises a heat sink 130. The heat sink 130 may comprise a heat transfer plate 131 and a plurality of fins 132 extending away from the heat transfer plate 131. The heat sink 130 is disposed beneath the PCB tot such that an upper surface of the heat transfer plate 131 faces the PCB tot and the fins 132 extend downwards from a lower surface of the heat transfer plate 131. The heat sink 131 is mechanically fastened to the transistors 109 of first and second power switch groups. The heat sink 130 and the connection of the heat sink 130 to the first and second power switch groups is described in detail below with reference to Figures 6A and 6B.

The solid-state circuit breaker 100 further comprises at least one clamping device 140 that secures the first and second connection busbars, the conductive element no and the PCB 101 to the heat sink 130. The embodiment shown in Figures land 2 comprises four clamping devices 140. The clamping devices 140 are described in more detail below with reference to Figures 5A and 5B Figure 3 shows a schematic plan view of the solid-state circuit breaker device of Figures 1 and 2. The perpendicular directions Zi and Z2 shown in Figure 3 lie within the planes /o in which the PCB 101, the mezzanine circuit board 120 and the tipper surface of the heat sink 130 are substantially disposed. The PCB 104 the mezzanine circuit board 120 and the heat sink 130 are stacked in the Z3 direction, which is perpendicular to the Zi and Z2 directions. The plan view, as described above, refers to a view of the device along the Z3 direction. As such, the plan view represents the relative positions of elements in the /5 Zi and Z2 directions, but not the Z3 direction.

A first peripheral area 301 and a second peripheral area 302 in the plan view are shown in Figure 3. The first peripheral area 301 overlaps a first peripheral portion of the PCB 101 adjacent to a first edge of the PCB and a first peripheral portion of the mezzanine circuit board 120. The primary and secondary driving circuits of the first power switch group 107 each overlap with the first peripheral area 301 when viewed in the plan view. The second peripheral area 302 overlaps a second peripheral portion of the PCB Dm adjacent to a second edge of the PCB 101 and a second peripheral portion of the mezzanine circuit board 120. The primary and secondary driving circuits of the second -0 or power switch group io8 each overlap with the second peripheral area 302 when viewed in the plan view. The first and second peripheral areas are separated in the Zi direction, and the conductive element no is disposed between the first and second peripheral areas. The first and second arms of the conductive element extend in the Z2 direction in the region between the first and second peripheral areas. The input 102, the output 103, the current flow paths between the transistor sources and drains 109, the first and second connection busbars, and the conductive element no are all disposed entirely outside of the first peripheral area 301 and the second peripheral area 302 when viewed in the plan view. A power loop 304 schematically illustrates the path of power supply current through the above described elements during operation of the device. The path of the power loop 304 is entirely outside the first peripheral area 301 and the second peripheral area when viewed in the plan view.

-12 -Figure 3 also illustrates a plane of symmetry 303 extending in the Z2 and Z3 directions (i.e. perpendicular to the Zi direction). The first connection busbar 105 and the second connection busbar 106 are disposed symmetrically with respect to the plane of symmetry 303. The first arm 111 and the second arm 112 of the conductive element 110 are also symmetrical with respect to the plane of symmetry 303. The arrangement of transistors 109 in the first power switch group 107 and the second power switch group 108 are symmetrical with respect to the plane of symmetry 303. The input 102 and the output 103 are disposed symmetrically with respect to the plane of symmetry 303. The /o first peripheral area 301 and the second peripheral area 302 are disposed symmetrically with respect to the plane of symmetry 303. In some embodiments, some of the above elements may not be disposed symmetrically with respect to the plane of symmetry 303. The symmetry of the elements of the device is advantageous in that external electromagnetic fields generated by current flow through the device on one /5 side of the plane of symmetry 303 may be at least partially cancelled by external electromagnetic fields generated by current flow through the device on the other side of the plane of symmetry 303, which results in a reduction of noise coupling between the power loop and the driving circuits. The symmetry of the device also helps allow for a total trace length and/or total resistance to be equal along each branch (i.e. the trace length and/or total resistance is equal regardless of which path the current follows through the transistors).

Figure 4 illustrates a schematic circuit diagram representing current paths between the input 102 and the output 103 in the embodiments shown in Figures 1 and 2. Each of the or transistors 109 of the first power switch group 107 comprises a source connection that is connected to the first connection busbar 105, a drain connection that is connected to the first arm in of the conductive element no, and a gate that is connected to a driving circuit of the first power switch group 107. Each of the transistors 109 of the second power switch group 108 comprises a source connection that is connected to the first arm 112 of the conductive element no, a drain connection that is connected to the second connection busbar 106, and a gate that is connected to a driving circuit of the second power switch group 108. The driving circuits of the first and second power switch groups are configured to control the gates to prevent current flowing from the sources to the drains in a transient overcurrent condition.

-13 -A power loop 304 is formed between the input 102 and the output 103 via the transistors 109 of the first and second power switch groups. As each power switch group comprises a plurality of transistors 109 that connect a respective connection busbar to the conductive element no, the power loop 304 comprises several distinct branches (or paths) between the input 102 and the output 103. For example, a first path 314 (see dotted line) is defined from the input to the output via a first transistor of the first power switch group and a first transistor of the second power switch group. A second path 324 (see dashed line) is defined from the input to the output via a second transistor of the first power switch group and a second transistor of the second power jo switch group. Preferably, each path between the input and the output has an equal total resistance along its length regardless of which transistor 109 of the first power switch group 107 and which transistor 109 of the second power switch group 108 defines the path. Preferably, the total length of the conductive path between the input 102 and the output 103 regardless of which transistor 109 of the first power switch group 107 and which transistor 109 of the second power switch group 108 defines the path (i.e. regardless of which particular combination of transistors 109 from the first power switch group 107 and the second power switch group 108 the current flows through). The conductive element lio (111, 112, 113) and connection busbars 105, 106 are shown underneath the paths 314, 324.

Figures 5A and 5B illustrate parts of the solid-state circuit breaker device shown in the embodiments of Figures 1 and 2. In the perspective view of Figure 5A, the PCB is shown as transparent so that elements below the PCB can be seen. Figure 5B is a cross-sectional view of a clamping device 140 used to secure the PCB, the first and second conductive busbars and the conductive element no to the heat sink 130. The embodiment shown in Figures 5A and 5B comprises four clamping devices 140, though a different number of clamping devices may be used in other embodiments.

Each clamping device comprises a first clamping member 141 disposed on top of the first conductive element no and a second clamping member 142 disposed beneath the first and second connection busbars. A fastener 143 joins the first 141 and second 142 clamping members together, thereby securing the PCB 101 between the conductive element llo and the first and second connection busbars. Each of the first and second clamping members has a substantially flat inner surface that faces the inner surface of the respective other clamping member. The first and second connection busbars and the conductive element no space the respective clamping members away from the PCB, -14-providing even surfaces for the inner surfaces of the clamping members to securely engage. The fastener may be a threaded screw 143 that passes successively through a hole portion in the first clamping member 141, a hole portion in the PCB 101, a hole portion in the second clamping member 142, and a threaded hole potion in the heat sink 130. As such the clamping device secures the first and second connection busbars, the conductive element 110 and the PCB 101 to the heat sink 130. The pressure at the interface between the connection busbars and the heat sink 130 provides improved contact in comparison with known devices and results in improved thermal performance.

Figures 6A shows a cross-sectional view of part of the solid-state circuit breaker loo of the embodiments shown in Figures 1 and 2, where the cross-section passes through the heat sink 130 and one power switch group. Figure 6B illustrates the heat sink 130 and the mounting of the heat sink 130 to a power switch group in a solid-state circuit breaker loo of the embodiments show in Figures iand 2 from below.

In these specific embodiments of the disclosure, the transistors are formed as part of discrete transistor packages 137 in which the transistor 109 is disposed within a transistor package housing and where the transistor package housing has a hole 138 formed therethrough. A TO-247 transistor package is an example of a suitable discrete transistor package for use in embodiments of the disclosure. The heat transfer plate 131 of heat sink 130 has several holes 133 formed therethough at positions corresponding to the positions of holes in the housings of the discrete transistor packages. The heat transfer plate 131 is mechanically fastened to the discrete transistor packages using or fasteners 134 that pass through the holes 133 in the heat transfer plate 131 from below as well as the holes 138 in the discrete transistor package housings. The fasteners 134 may, for example, be threaded bolts that are secured with nuts 136. In some embodiments, an anti-rotation clamp 1,35 is disposed on top the discrete transistor packages of each power switch group in order to prevent rotation of nuts during manufacture such that the bolts can be fastened to the nuts 136 from below.

The mechanical fastening of the discrete transistor packages 137 to the heat sink 130 from below removes the need for holes in the PCB for providing fastenings to the discrete transistor packages 137. This allows a smaller overall size for the PCB and, therefore, a smaller overall size for the solid-state circuit breaker device. Moreover, fastening from below removes the need for a fastener at the upper surface of the PCB, -15 -reducing the risk of electrical shorts. Furthermore, the pressure at the interface between the discrete transistor packages 137 and the heat sink provides improved contact in comparison with known devices and results in improved thermal performance.

The circuit breaker described herein may be implemented as part of any electrical apparatus or device, or in any suitable electrical circuit. It is noted herein that while the above describes various examples of the circuit breaker of the first aspect, this description should not be viewed in a limiting sense. Rather, there are several /o variations and modifications which may be made without departing from the scope of the present invention as defined in the appended claims.

Claims

-16 -Claims 1. A solid-state circuit breaker comprising: a first power switch group and a second power switch group, each power switch 5 group comprising at least one transistor and at least one driving circuit configured to control the at least one transistor; a conductive element comprising first and second arms disposed symmetrically with respect to a plane of symmetry and a connection portion connecting the first and second arms to each other; wherein the first and second power switch groups are disposed symmetrically with respect to the plane of symmetry; the first power switch group is configured to provide a first current path between an input and the first arm of the conductive element when switched on, and the second power switch group is configured to provide a second current path between the second arm of the conductive element and an output when switched on, the first and second current paths forming part of a power loop from the input to the output via the conductive element and the first and second power switch groups; and wherein the at least one driving circuit of each power switch group does not overlap with the conductive element when viewed in a plan view.
2. The solid-state circuit breaker of claim 1, wherein the first current path comprises a first connection busbar that is electrically connected to the input and the second current path comprises a second connection busbar that is electrically connected to the output, wherein the first connection busbar is electrically connected to the first arm of the conductive element via the first power switch group and wherein the second connection busbar is electrically connected to the second arm of the conductive element via the second power switch group.
3. The solid-state circuit breaker of any preceding claim, wherein the first and second power switch groups each have the same number of transistors.
4. The solid-state circuit breaker of any preceding claim, wherein the first power switch group comprises a plurality of transistors arranged in parallel to provide the first current path; and wherein the second power switch group comprises a plurality of 35 transistors arranged in parallel to provide the second current path.
-17 - 5. The solid-state circuit breaker of claim 4, wherein the total resistance along a path between the input and the output is the same for all branches of the power loop.
6. The solid-state circuit breaker of claim 4 or claim 5, wherein the total trace length from the input to the output via a transistor of the first power switch group and a transistor of the second power switch group is the same for all combinations of transistors in the first and second power switch groups.
7. The solid-state circuit breaker of any of claims 4 to 6, wherein the transistors of /o the first power switch group and the second power switch group are disposed symmetrically with respect to the plane of symmetry.
8. The solid-state circuit breaker of any preceding claim, wherein the first and second power switch groups each comprise four transistors.
9. The solid-state circuit breaker of any preceding claim, wherein the conductive element and the first and second connection busbars are formed of copper.
10. The solid-state circuit breaker of any preceding claim, further comprising at least one clamping device having first and second clamping members, the first clamping member being disposed on top of the conductive element and the second clamping member being disposed beneath the first and second connection busbars, wherein the first and second clamping members are biased towards each other with a fastener.
The solid-state circuit breaker of any preceding claim, further comprising a printed circuit board, PCB, wherein the conductive element is disposed on an upper surface of the PCB and the first and second connection busbars are disposed on a lower surface of thc PCB.
12. The solid-state circuit breaker of claim 10, wherein a part of the driving circuits of each of the power switch groups are disposed on peripheral portions of the PCB.
13. The solid-state circuit breaker of claim 11 or claim 12, further comprising a heat sink disposed beneath the PCB, wherein the transistors of the first and second power switch groups are mechanically fastened to the heat sink.
14. The solid-state circuit breaker of any of claims 11 to 13, wherein the transistors of the first and second power switch group are each provided as part of a discrete transistor package disposed on the underside of the PCB.
15. The solid-state circuit breaker of claim 14, wherein each of the discrete transistor packages has a hole formed therethrough, and wherein the discrete transistor packages are fastened to the heat sink using a transistor fastener that passes through a hole in the heat sink and the hole in the discrete transistor package and attaches to a /o transistor clamp disposed on the upper side of the discrete transistor package.
16. The solid-state circuit breaker of claim 15, wherein the first transistor group comprises a plurality of discrete transistor packages, and where each discrete transistor package of the first transistor group is fastened using the same transistor clamp.
17. The solid-state circuit breaker of any preceding claim, further comprising a mezzanine circuit board comprising at least part of the driving circuits of each of the power switch groups.
18. The solid-state circuit breaker of any preceding claim, wherein the driving circuits of each of the power switches are configured to control the transistors to prevent flow of current through the power loop in an overcurrent condition.