GB2551108A - Image sensor - Google Patents

Image sensor Download PDF

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Publication number
GB2551108A
GB2551108A GB1607956.8A GB201607956A GB2551108A GB 2551108 A GB2551108 A GB 2551108A GB 201607956 A GB201607956 A GB 201607956A GB 2551108 A GB2551108 A GB 2551108A
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United Kingdom
Prior art keywords
electrode
charge
image sensor
multiplication
sensor according
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GB1607956.8A
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GB201607956D0 (en
Inventor
Holland Andrew
Stefanov Konstantin
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Teledyne UK Ltd
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Teledyne e2v UK Ltd
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Priority to GB1607956.8A priority Critical patent/GB2551108A/en
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Priority to PCT/GB2017/051267 priority patent/WO2017191475A1/en
Publication of GB2551108A publication Critical patent/GB2551108A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14806Structural or functional details thereof
    • H01L27/14812Special geometry or disposition of pixel-elements, address lines or gate-electrodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14831Area CCD imagers
    • H01L27/1485Frame transfer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76816Output structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76833Buried channel CCD
    • H01L29/76858Four-Phase CCD

Abstract

An image sensor (Fig. 1, 1) (CCD, CMOS) for providing charge multiplication by impact ionisation, comprising: an image area (Fig. 1, 2); a plurality of multiplication elements. The image area comprises a plurality of photo-sensitive elements. The multiplication elements receive charge from the photo-sensitive elements of the image area. Each multiplication element 600 comprises a sequence of electrodes P1, P2DC, P2HV, P3, including a charge multiplication electrode P2HV, arranged along a charge transport path. The charge multiplication electrode P2HV causes charge multiplication as the charge is transferred along the charge transport path by the electrodes. The charge multiplication electrode comprises a back edge 618, two sides 607, 609, and a leading edge 604. The two sides are separated by a maximum width 605 across the charge transport path. The leading edge 604 has one or more changes in direction (i.e. jagged, saw-tooth, serrated edge) such that the length of the edge is greater than the maximum width.

Description

Image Sensor
FIELD OF THE INVENTION
This invention relates to image sensors, particularly semiconductor image sensors.
BACKGROUND
In a typical CCD image sensor, signal charge representative of incident radiation is accumulated in an array of pixels in an image area. Following an integration period, signal charge is transferred to a store section and then to an output register by applying appropriate clocking or drive pulses to control electrodes. If the illumination is pulsed or shuttered, transfer directly from image to register can occur during the non-illuminated period without the use of a store section. The signal charge is then read out from the output register and applied to a charge detection circuit to produce a voltage that is representative of the amount of signal charge. The sensitivity of such a device is limited by the noise of the charge to voltage conversion process and that introduced by the subsequent video chain electronics.
An electron multiplying CCD (EMCCD) overcomes this limitation and is disclosed in our earlier published UK patent application GB-A-2,371,403, as shown in Figure 1. A CCD image sensor 1 comprises an image area 2 made up of photosensitive elements, a store section 3 and an output or read-out register 4, each of these components being found in a conventional CCD image sensor. The output register 4 is extended serially to give a multiplication register 5, the output of which is connected to a charge detection circuit 6.
During operation of the device, incident radiation is converted at the image area 2 into signal charge which is representative of the intensity of the radiation impinging on the array of pixels making up the image array. Following the image acquisition period, drive pulses are applied to control inputs 7 to transfer the charge accumulated at the pixels of the image area 2 to the store section 3. Simultaneously with this, drive pulses are also applied to control inputs 8 at the store section 3 to cause charge to be transferred from row to row as indicated by the arrow, the last row of charge held in elements in row 3 being transferred in parallel to the output register 4.
When a row of signal charge has been transferred into the output register 4, appropriate drive pulses are applied to the inputs 9 to sequentially transfer the charge from the elements of the output register to those of the multiplication register 5. In this arrangement, the multiplication register is of similar architecture to the output register in so far as the channel doping is concerned with the addition of an electrode for multiplication
The EMCCD uses impact ionisation to multiply the signal charge within the stages of the multiplication register. To achieve significant electron multiplication (EM) gain, the charge is passed through many multiplying stages as the typical gain per stage is only around few percent. Impact ionisation occurs at electric fields of the order of 105 V/cm and higher, and to generate them in the charge transport channel of a CCD, the applied electrode or “gate” voltages are typically much higher than those required for ordinary charge transfer.
The operating principles of the EMCCD were first described by Madan in IEEE Transactions on Electron Devices, no. 6 (1983), pp. 694-699, and have subsequently been developed into well-established technology, as described for example by Hynecek in US Pat. No. 5,337,340.
Figure 2 shows the principle of EM in a buried channel (BC) CCD 200. Such electron multiplication may be implemented in a CCD image sensor system such as that described above. Before the electron multiplication (A), signal charge 202 is stored under the electrode P1, which is appropriately biased. While the charge is kept under P1 the high electric field for EM is established between the electrode P2DC and P2HV. The electrode P2DC is biased at constant potential and its function is to separate the stored charge 202 under P1 from the high field region under P2HV.
When the potential applied to P1 is reduced sufficiently to remove the potential barrier to P2DC, the stored electrons 202 are able to travel under the electrode P2DC towards P2HV, passing though the high electric field region and undergoing impact ionisation 204. The signal charge, including the newly generated electrons, is collected under P2HV while the holes travel towards the gate oxide or the channel stops and are eventually drained into the substrate.
For the EM to occur it is important to have a region with sufficiently high electric field, established before the signal electrons 202 pass through it. This is required because the charge transfer time between adjacent electrodes, helped by fringing fields in the direction of the transfer, is usually only a few nanoseconds. This time is too short compared to the achievable rise times of electrode potentials in a practical device, and does not allow sufficient field to be established once the transfer has already started. EM in CCDs is usually realised as a single pass operation by shifting the signal through multiple, independent multiplying stages, for example by using the multiplication register described above. Alternatively, the charge can be shifted forwards and backwards between two or more amplifying stages until the desired gain is achieved.
Similarly to CCDs, EM has been demonstrated in various arrangements in CMOS imaging technology, using the same basic principle shown in Figure 2 and different number and configuration of transfer electrodes. In one prior arrangement (US Pat. No. 7,538,307) charge is transferred repetitively between three electrodes outside the photosensitive element and multiplied in the process. In another arrangement (US Pat No. 7,755,685) EM gain is achieved by circulating the charge in a loop around the photosensitive element within the pixel area, passing through at least one EM stage per loop. In CMOS sensors using pinned photodiodes (PPD) as photosensitive elements, the EM structure can be implemented outside the main photodiode using transfer electrodes and elements similar to the PPD (EP Pat. No. 2 503 596, FR 2973160), or within the main photosensitive PPD element (US Pat. No. 8,592,740, FR 2961347).
One of the challenges in EMCCD design is to ensure that no spurious charge is generated during the multiplication of the signal charge. When the high voltage electrode P2HV covers any non-depleted regions outside the buried channel, such as the p-type channel stops, it is possible that the holes in their movement to and from the channel stops get accelerated to sufficiently high energy to cause undesirable impact ionisation. This effect generates spurious electrons which get collected as parasitic dark signal.
To minimize the generation of unwanted spurious charge, it is often desirable to separate the high field EM region from the channel stops, as demonstrated by Hynecek in US Pat. No. 6,278,142 and by Hadfield in US Pat. No. 7,619,201. One frequently used method is to enclose the P2HV electrode by the P2DC electrode above the channel stops, as shown in Figure 3.
The shape of the HV electrode is usually rectangular or circular, and its dimensions are dictated by the need to avoid high electric fields near the channel stops and the requirement to store and transfer the larger quantity of charge which results from the multiplication process.
Increasing the EM gain in the structure in Figures 2 or 3 can be accomplished by increasing the voltage applied to the electrodes or reducing the inter-electrode gaps, both of which increase the electric field. The voltage at the HV electrode is limited by the breakdown voltage of the electrode dielectric, but other undesirable effects usually occur first, such as increased generation of spurious charge and increased electron trapping at the interface between the semiconductor and the electrode dielectric due to the contact of the signal charge with the interface. The inter-electrode gaps are determined by the manufacturing process and are fixed for a particular technology.
In order to reduce the spurious charge generation it is necessary to operate the device at the minimum possible HV voltage, which also reduces any aging effects and the power dissipation. Achieving the maximum possible gain at a certain voltage is very desirable for device design and operation. For example, increasing the EM gain provides a larger signal to noise ratio during image processing. This allows for a more efficient image sensor, which produces clearer images at low illumination levels. If possible, increased gain should be achieved by means other than increasing the high voltage magnitude to avoid the aforementioned drawbacks of using high voltages during charge transfer.
SUMMARY
We have appreciated the need to improve upon the efficiency of electron multipliers. In particular, we have appreciated the need to increase the EM gain achieved by electron multiplication elements without having to increase the voltages applied to the electron multiplication electrode (the high voltage electrode) which can cause undesirable effects such as increased generation of spurious charge and increased electron trapping at the interface between the semiconductor and the electrode dielectric due to the contact of the signal charge with the interface.
The invention is defined in the independent claims to which reference is directed. Some embodiments are defined in the dependent claims.
In particular, there is provided an image sensor of the type for providing charge multiplication by impact ionisation. The image sensor comprises an image area having a plurality of photosensitive elements and a plurality of multiplication elements arranged to receive charge from the photosensitive elements of the image area. Each multiplication element comprises a sequence of electrodes arranged along a charge transfer path including a charge multiplication electrode. These electrodes are arranged to cause charge multiplication as charge is transferred along the charge transfer path by the electrodes. The charge multiplication electrode of each multiplication element has a back edge defining a boundary with a first electrode, a maximum width across the charge transfer path, and a leading edge defining a boundary with a second electrode for charge multiplication and arranged across the charge transfer path and extending across the maximum width. The leading edge has one or more changes of direction such that the length of the edge is greater than the width of the charge multiplication electrode across the charge transfer path.
Optionally, the charge multiplication electrode has one or more protruding portions that protrude along the channel in comparison to one or more recessing portions
This is advantageous as the increased length of one side of the electron multiplication element along with shapes such as those defined in the claims increases the following quantities: a) the volume of the high field region where most of the multiplication takes place; b) the magnitude of the electric field over a part of the electrode electrodes used in the EM process; c) the density of the electron current transferred from the electrodes preceding the high voltage electrode through the high field region.
Such an increase in these quantities increases the EM gain of the electron multiplication element while keeping the high voltage magnitude the same, or alternatively, allows the electron multiplication element to achieve the same gain as in a traditional structure (using rectangular or circular electrodes) at a lower voltage.
BRIEF DESCRIPTION OF THE DRAWINGS
Some ways in which the invention may be performed are described in more detail by way of example with reference to the accompanying drawings, in which:
Figure 1: is a schematic view of a known EMCCD image sensor having a multiplication register;
Figure 2: is a schematic view of a cross section of a known electron multiplication element;
Figure 3: is a schematic view of a known multiplication element;
Figure 4: shows the path taken by electrons at a particular point in time during an EM process in a known electron multiplication element;
Figure 5: shows the impact ionisation rate of electrons at a particular point in time during an EM process in a known electron multiplication element;
Figure 6: is a schematic diagram of a first arrangement embodying the invention;
Figure 7A: is a schematic diagram showing the path taken by electrons during an EM process for a known electron multiplication element;
Figure 7B: is a schematic diagram showing the path taken by electrons during an EM process for the first arrangement embodying the invention;
Figure 8: is a schematic diagram of a second arrangement embodying the invention;
Figure 9: is a schematic diagram of a third arrangement embodying the invention;
Figure 10: is a schematic diagram of a fourth arrangement embodying the invention;
Figure 11: shows the impact ionisation rate of electrons at a particular point in time during an EM process for a known electron multiplication element as well as the arrangements of figures 7 to 9;
Figure 12: shows the path taken by electrons at a particular point in time during an EM process in the arrangement of figure 9;
Figure 13: is a schematic diagram of a fifth arrangement embodying the invention;
Figure 14: is a schematic diagram of a sixth arrangement embodying the invention;
Figure 15: is a schematic diagram of a seventh arrangement embodying the invention;
Figure 16: shows the path taken by electrons at a particular point in time during an EM process in the arrangement of figure 14;
Figure 17: shows the experimentally measured EM gain in a EMCCD with: (A) rectangular HV electrode; (B) HV electrode design of figure 9; (C) HV electrode design of figure 14;
Figure 18: shows the experimentally measured EM gain in a EMCCD extrapolated for 500 EM stages with: (A) rectangular HV electrode; (B) HV electrode design of figure 9; (C) HV electrode design of figure 14;
Figure 19: shows a schematic diagram of an eighth arrangement embodying the invention;
Figure 20: shows a schematic diagram of a ninth arrangement embodying the invention;
Figure 21: shows a schematic diagram of a tenth arrangement embodying the invention;
Figure 22: shows a schematic diagram of an eleventh arrangement embodying the invention;
Figure 23: shows a schematic diagram of a twelfth arrangement embodying the invention;
Figure 24: shows a schematic diagram of a thirteenth arrangement embodying the invention.
DETAILED DESCRIPTION
The invention may be embodied in a variety of devices such as an electron multiplication element for use in an image sensor (for example as part of an electron multiplication register), an image sensor such as a CCD or CMOS image sensor, a semiconductor-based imaging device, semiconductor image sensor modules, cameras and other optical devices.
The present disclosure describes various arrangements of an electron multiplier element embodying the present invention. The described arrangements significantly reduce the voltages required to achieve EM gain values compared to traditional EM CCDs or alternatively provide increased EM gain values for comparable voltages, i.e. increasing the EM gain without increasing the associated voltages.
Embodiments described herein provide the benefit of increasing the EM gain in a structure such as in Figure 2 without increasing the voltage applied to the electrodes or reducing the inter-electrode gaps. Such benefits can be achieved by using the techniques described below.
To aid understanding, some background theory shall be discussed first, before turning to a description of a specific arrangement of the invention.
The carrier generation rate from impact ionisation G (the number of carriers generated per unit volume and unit time) is given by (S. M. Sze “Physics of Semiconductor Devices”, Wiley 1981, p. 45):
Here an is the number of electron-hole pairs generated per travelled distance by an electron, n is the electron density and vn is the electron velocity. Only impact ionisation by electrons is considered because the ionisation rate by holes is much smaller than that of electrons. The ionisation rate an has very strong, exponential dependence on the electric field. The generation rate can also be expressed as
where jn is the electron current density (current per unit area) and q is the elementary charge.
Electron multiplication is a statistical process and the probability of ionisation events increases with the magnitude of the electric field and the density of the electron current traversing the high field region. Under identical electric field and current density, higher EM gain would be expected from structures where the size of the high field region is larger, because the probability of impact ionisation increases. In a simplified one-dimensional case (Madan 1983), the multiplication factor M for constant an can be expressed as:
where L is the length of the EM region in Figure 1(A). The length of the EM region has major influence over the multiplication gain because of the exponential term.
Further, using 3D semiconductor device simulation software, it is possible to determine the path of the signal electrons during the EM process, as shown in Figure 4.
Figure 5 shows that the impact ionisation rate, simulated at a moment in time during the charge multiplication process, is highest around the centre line of the rectangular HV electrode. This coincides with the region where the electric field between the HV and DC electrode is the highest, as the field drops off near the corners of the HV electrode due to edge effects. The area of maximum impact ionisation rate also coincides with the electron flow in Figure 4.
From these considerations, it can be seen that the possible ways to increase the EM gain are to increase the effective volume of the EM region (for example by increasing L), to increase the density of the electron current traversing the EM region, or to increase the electric field. It may be also possible to increase two or all three of these factors simultaneously.
It has been appreciated that increasing the effective volume of the EM region can be accomplished by increasing the perimeter length of the leading edge of the HV electrode, according to embodiments of the invention.
The leading edge of the HV electrode defines a boundary with another electrode such as a DC electrode or a clocked electrode that is arranged adjacent the leading edge. The leading edge is orientated such that it extends across the maximum width of the HV electrode across the channel; it is the boundary between, for example, the DC electrode and the HV electrode across which the electrons undergo EM as they are transferred along the channel, as shown in figure 3.
The purpose of increasing the leading edge of the HV electrode is to increase the length of the electron path during the transfer across the boundary between the leading edge of the HV electrode and the adjacent electrode, and thereby increasing the effective volume of the high field region.
Further, it has been appreciated that the electric field and the electron density of the EM region can be increased by appropriately shaping the HV electrode, as will be explained in more detail below.
With reference to figure 6, an electron multiplication element 600 embodying the invention will now be described. It will be appreciated that such an element may be a part of a CCD or CMOS image sensor of the type for providing charge multiplication by impact ionisation, such as those described above. However, in the present embodiment the EM element is arranged in a CCD image sensor. The CCD image sensor may comprise a plurality of photosensitive elements, which may be described as pixels, and a plurality of multiplication elements arranged to receive charge from the pixels of the image area.
The electron multiplier element 600 comprises a sequence of electrodes arranged along a charge transport path, which here may be a buried channel 602. This sequence of electrodes includes a charge multiplication electrode, or high voltage electrode P2HV, arranged to cause charge multiplication as charge is transferred along the channel 602 by applying appropriate voltages, which may be described as drive pulses, to the electrodes. Here, the EM element 600 further comprises a DC electrode P2DC adjacent to the HV electrode.
The channel 602 has a channel width 603, that extends from a channel stop 612 on one side of the channel, to a second channel stop 613 on the other side of the channel. The channel 602, bounded on either sides by the channel stops 612 and 613, defines a region of charge transfer, within which charge is clocked along the channel. This is achieved by the application of appropriate voltages to the electrodes in a similar manner to that described above. Charge flows from the P2DC electrode to the P2HV electrode, as shown in figure 7B.
In the present embodiment, these two electrodes are arranged such that the P2DC electrode encloses the P2HV electrode along three of the P2HV electrode’s sides. This is to ensure that the P2HV electrode is isolated from the channel sides to prevent spurious dark current being produced during electron multiplication, much like the arrangement described in relation to figure 3 above. As such, the maximum width 605 of the P2HV electrode is less than the width 603 of the channel 602. P2HV has an edge 604, which may be referred to as a leading edge, across the channel width. Further, in the present embodiment, the P2HV electrode comprises a first side edge 607 and a second side edge 609. The first side edge 607 and the second side edge 609 are each arranged along the channel in a direction parallel the direction of net charge transfer. They are arranged on opposing sides of the P2HV electrode such that the length of the first side edge 607 extends parallel to, and aligns with, the length of the second side edge 609 along the channel. In the present embodiment, the first side edge 607 forms the edge of the P2HV electrode that is closest to the channel stop on one side of the channel 602 and the second side edge 609 forms the edge of the P2HV electrode that is closest to the channel stop on the opposing side of the channel. Thus, the first side edge 607 and the second side edge 609 define the maximum width 605 of the HV electrode across the channel 602. The leading edge 604 extends across the maximum width 605, from the first side edge 607 to the second side edge 609 across the channel 602. It should be noted that the first side edge 607 and the second side edge 609 do not form part of the leading edge 604 in the present embodiment. This is because they do not extend across the maximum 605 width of the HV electrode. Instead, they define the boundaries of the maximum width 605, running parallel to it and arranged on either side of it. Therefore, the present arrangement may be described as having a leading edge and two separate side edges.
The leading edge 604 has one or more changes of direction such that the length of the edge is greater than the width 605 of the charge multiplication electrode P2HV across the channel. In other words, the length of the leading edge 604, is greater than the distance between the first side edge 607 and the second side edge 609. Here, the leading edge 604 of the charge multiplication electrode P2HV has one or more protruding portions 606 and one or more recessing portions 608. The protruding portions 606 protrude along the channel in comparison to the recessing portions 608. The protruding portions 606 protrude in the direction opposite the net direction of charge transfer and the recessing portions recess in the direction of net charge transfer.
In the present embodiment, the changes in the orientation of the edge 604 relative to the channel 602 are discontinuous. Each protruding portion 606 has two slanted edge portions 611, which are angled such that they come together at a point 610 to form a tip. Thus, each protruding portion 606 has a triangular or tooth shape. Here, the leading edge 604 has eight slanted edge portions 611 and four tips 610, which form teeth 606 arranged across the channel 602. Thus, the angular changes in direction of the edge 604 form a saw tooth shape that runs from the first side edge 607 to the second side edge 609.
These angular changes in direction are mirrored by the P2DC electrode such that separation between the two electrodes remains substantially constant around the perimeter of the P2HV electrode.
The electron multiplication electrode P2HV also comprises a back edge 618 defining a boundary with a first electrode, which here is a first transfer or clocked electrode P3. In the present embodiment, the electron multiplication element 600 also comprises a second clocked electrode P1. Electrode P1 is arranged adjacent to the DC electrode and the first clocked electrode P3 is arranged adjacent to the back edge 618 of the charge multiplication electrode. The two clocked electrodes P1 and P3 are both arranged across the charge transfer channel 602. Electrodes P1 and P3 are arranged either side of the P2 electrodes along the length of the channel, such that electrons are clocked from electrode P1, across electrode P2, to electrode P3 as they are clocked along the channel. Thus, in this arrangement, the electrode P1 is the electrode furthest along the channel in the direction opposite the direction of charge transfer. This electrode may be described as the electrode that is furthest “upstream”. As charge is clocked along the channel, charge travels “downstream”, across electrode P1. This charge then travels across the boundary between the clocked electrode P1 and the DC electrode. The charge, continuing downstream, travels across the DC electrode until it reaches the boundary between the DC electrode and the HV electrode. As charge transfers across this boundary (i.e. across the leading edge of the HV electrode), it undergoes EM. The charge is transferred across the HV electrode and crosses the boundary between the back edge of the HV electrode and the clocked electrode P3. These electrodes transfer charge along the channel in the manner described with respect to figure 2 earlier.
In the present embodiment P2DC and P2HV are operable to cause EM gain by impact ionisation in a similar manner described with respect to figures 2 and 3 above. However, in the present embodiment, the shape of the P2HV electrode increases the length of the leading edge 604 of the high voltage electrode which increases the length of the electron path during the transfer from the DC electrode, as shown in figure 7.
Figure 7 shows a schematic depiction of the path of the electrons in a rectangular HV electrode 701 (Figure 7A) and in the serrated HV electrode of the present embodiment (figure 7B). In the case of the serrated HV electrode, the electron path 703 as the electrons transition over the boundary between the P2DC electrode and the P2HV electrode can be longer compared to the electron path 702 of the rectangular electrode design. The changes of direction of the leading edge 604 across the channel affect the electric field in the EM region. Due to this, electrons tend to move across the slanted edge portions 611 as they transition from the P2DC region to the P2HV region, as can be seen from figure 7B. This causes the electrons to move in curved paths, which is in contrast to the rectangular electrode design where the majority of the electrons travel in straight lines.
As explained above, an increase in the length of the EM region (i.e. the length of the electron path as it transitions from the P2DC electrode to the P2HV electrode) has a significant impact in the EM gain achieved by the multiplication element 600. As the path of the electrons for the P2HV electrode having a serrated edge is increased compared to the path of the electrons for the rectangular HV electrode, the EM gain for the P2HV electrode is greater compared to the rectangular HV electrode.
In addition, the serrated shape of the present embodiment increases the density of the electron current and the electric field by funnelling the electrons through particular sections of the HV electrode. As described above, electrons tend to move across the slanted edge portions 611 of edge 604 as they transition from the P2DC region to the P2HV region. Thus, the electron density at the slanted edge portions is increased compared to the electron density of the rectangular arrangement 701; the electrons are funnelled through region of the channel corresponding to the slanted edge portions 611 of the present embodiment, whereas the electrons are evenly distributed across the flat face of the rectangular electrode 701. Such funnelling provided by the leading edge 604 improves the likelihood of the electrons undergoing electron multiplication and thus improves the EM gain compared to that of the rectangular arrangement 701.
In addition, the sharp edges of the saw tooth shaped electrode further increases the electric field resulting in a further EM gain.
Thus, an electron multiplication element is provided that comprises an electron multiplication electrode that is shaped such that, as electrons are transferred along the charge transfer channel, the element provides an increased volume of the electron multiplication region, an increase electric field associated with the EM region and an increased density of the electron current flowing between the DC electrode and the HV electrode. This results in an increased EM gain compared to existing EM elements for a given voltage and allows the electron multiplication element of the invention to operate at a lower voltage and still achieve a comparable gain.
Further arrangements embodying the invention will now be described along with specific examples that display the advantages of the invention.
Figures 8, 9 and 10 show further arrangements of the EM element embodying the present invention for an image sensor of the type using CCD techniques. Figure 8 shows a castellated arrangement wherein the leading edge 804 of the HV electrode is shaped such that the electrode has protruding portions 808, or turrets, and recessing portions 806. Here, the leading edge 804 runs across the maximum width of the P2HV electrode defined by the first side edge 807 and the second side edge 809 of the castellated multiplication electrode P2HV. As with the embodiment described in relation to figure 6 above, the leading edge 804 is the edge of the HV electrode that extends across the maximum width of the electrode, i.e. from the first side edge 807 to the second side edge 809. The two side edges themselves do not form part of the leading edge as they extend parallel to, and along each side of, the maximum width. As such, they at no point extend across the maximum width of the HV electrode.
The leading edge 804 is shaped to form three turrets 806, spaced across the width of the P2HV electrode. The turrets 806 are separated by two recessing portions 808. Like with the embodiment described in relation to figure 6, the leading edge 804 comprises changes in direction that are discontinuous.
Figure 9 shows a castellated arrangement wherein the leading edge 904 is shaped such that the electrode has two turrets protruding in the direction opposite the net direction of charge transfer, separated by one central receding portion 908. Further, adjacent each turret 906 is another receding portion 908. The first of these is adjacent a first side edge 907 on one side of the P2HV electrode and the second of these is adjacent a second side edge 909, the side edges 907 and 909 being arranged on either side of the P2HV electrode in the same manner described previously. Once again, the leading edge 904 extends across the maximum width from the first side edge 907 to the second side edge 909. As with the previous arrangements, neither the first of the second side edge forms part of the leading edge.
Figure 10 shows a castellated arrangement wherein the leading edge of the HV electrode is shaped such that the electrode has two sets of protrusions 1006 on either side of the electrode, each with a stepped profile. These two stepped protrusions 1006 are separated by a central recessing portion 1008. The two stepped protrusions 1006 protrude along the channel in a direction opposite the net flow of charge when charge is clocked along the channel. The stepped protrusions 1006 comprise two steps. The first step 1014 of each of the stepped protrusions 1006 is arranged adjacent to a side edge of the P2HV electrode and protrudes further along the channel than the second step 1015. The second step 1015 of each of the protrusions 1006 is arranged adjacent to the central recessing portion 1008. Here, the leading edge 1004 does not extend along the channel any further than the first 1007 and second 1009 side edge. However, it still extends across the maximum width of the HV electrode across the channel width and as such defines the leading edge of the HV electrode. The first and second side edges do not extend across the maximum width and therefore do not form part of the leading edge.
In all of these arrangements the DC electrode is shaped to complement the protrusions of the HV electrode such that the separation between the two electrodes is substantially constant.
In all arrangements the length of the leading edge of the HV electrode is significantly longer than the length of the leading edge in rectangular or circular electrodes of the same area, and the ratio of this length over electrode area is substantially larger than that in rectangular, circular or semi-circular electrodes.
Figure 11 shows the simulated impact ionisation rate for the three structures in Figures 8, 9 and 10 and qualitatively compares them to a rectangular HV structure. It is apparent that the EM process occurs all along the extended periphery of the modified HV electrode, i.e. all along the leading edge of each HV electrode. Thus, the overall impact ionisation rate of each of these castellated arrangements is greater than the rate for the rectangular arrangement.
Figure 12 shows the simulated path of the electrons for the structure in Figure 10, and shows qualitatively that the electrons travel through wider area and bigger high-field volume compared to the rectangular electrode structure in Figure 4.
As mentioned above, the EM gain may also be increased by increasing the density of the electron current and the electric field through appropriate shaping of the HV and the DC electrodes. As can be seen in figure 12, the stepped arrangement results in a number of the electrons being funnelled across the central recess portion 1008 of leading the edge, resulting in a high electron density in this region.
Further, the angular changes in direction also increase the electric field strength in the EM region.
As with the saw tooth arrangement described earlier, all three of these factors result in an increase in EM gain compared to rectangular or circular arrangements.
Figure 13 shows a simple arrangement embodying the present invention. Here, the leading edge 1304 is arranged to have a single angular change in direction half way across the width of the P2HV electrode. The leading edge thus has two slanted edge portions 1311 which meet to form a single point 1310, forming a triangular shape protrusion which protrudes along the channel. In this arrangement, electrons tend to travel through the slanted edge portions 1311 for the same reason as described in relation to the saw tooth arrangement. Thus, the electrons follow a curved path as they are clocked across the boundary between the P2DC electrode and the P2HV electrode, and as such, the EM gain of this structure is increased compared to the EM gain of a rectangular or circular arrangement. The leading edge, once again extends across the maximum width of the HV electrode defined by the first 1307 and second 1309 side edges.
Alternatively, the slanted edge portions may be arranged such that they form a triangular shaped recess (not shown), which recesses in the direction of charge transfer. Such a recess may serve to funnel electrons as they transfer from the DC electrode to the HV electrode, increasing the electron density and therefore the EM gain.
The triangular shapes describes above may be approximated with a staircase-style structure as shown in Figures 14 and 15. Both the arrangements of figure 14 and 15 comprise a HV electrode that has a leading edge 1404, 1504 extending across the maximum width of the HV electrode that comprises a single stepped protrusion 1406, 1506 that protrudes along the channel. The stepped protrusion 1406, 1506, comprises two sets of stairs which meet half way along the width of the P2HV electrode. The section of the leading edge at which the two sets of stairs meet forms a central protruding portion 1416, 1516. The central protruding portion 1416, 1516 is the portion of the P2HV electrode that protrudes furthest along the channel.
The arrangement of figure 15 differs from that of the arrangement of figure 14 in that the clock electrode P1 of the arrangement of figure 15 has also been shaped into a staircase-style structure protruding towards the HV electrode.
These protruding portions of P1 protrude such that the distance between the edge of the charge multiplication electrode 1504 and the edge of the first clock electrode is reduced. Therefore, the DC electrode narrows substantially in the region between the staircase-style structure of the HV electrode protruding towards the P1 electrode and the staircase-style structure of the P1 electrode protruding towards the HV electrode.
Further, in this arrangement, the charge multiplication electrode and the first clock electrode each have a central protruding portion, 1516 and 1517 respectively. The central portion 1516 of the charge multiplication electrode and the central portion 1517 of the first clock electrode substantially align. Thus, the separation between the clock electrode P1 and the HV electrode is at its smallest in the region where the edge of the central portion 1516 and the edge of the central portion 1517 align across the width of the channel.
This progressive narrowing of the two electrodes and the thinning of the DC electrode that separates them acts to funnel the electrons across the central portion 1517 of P1 to the central portion 1516 of the HV electrode. This increases the electron density in the EM region. At the same time, the electric field has been increased as well, due to the implementation of a sharp edge shape in the HV electrode. This is shown in figure 16 which displays the simulated electron path in the structure of Figure 15.
It will be appreciated that any appropriate technique may be used to manufacture these arrangements. For example, using a low voltage CMOS process, an experimental device containing the designs based on Figure 10, Figure 15 and a rectangular electrode was manufactured and tested. The device may, for example, be based on a buried channel CCD with a 10 pm pixel pitch and which may contain 100 EM elements per design. The rectangular electrode size may be, for example, 3 pm long by 5 pm wide, and for all designs the HV electrode width may be 5 pm.
Figure 17 shows the experimentally measured EM gains per stage for the two designs with optimised shape of the HV electrode, and compares them to a rectangular electrode, using the example values above. As can be seen from figure 17, the arrangements of B and C, which correspond to the arrangements of figure 10 and 15 respectively, show a notable increase in EM gain compared to arrangement A, which corresponds to a rectangular arrangement.
The advantages of the invention can be seen even more clearly when it is appreciated that EM devices usually have several hundred EM stages in order to achieve sizeable gain. In a CCD imager, these multiple EM stages are provided by arranging many EM elements in an EM register such as that described with respect to figure 1. In such an arrangement, charge is clocked across all the EM elements in the register and therefore undergoes EM each time it is transferred across the HV electrode of each EM element. Thus multiple EM stages are provided.
The gain from a device having M stages with gain per stage g is given by:
Due to the power law dependence, a small difference in the gain per stage can create very large total gain difference after a large number of EM stages.
Figure 18 shows the EM gain for the 3 designs presented in Figure 17, extrapolated for 500 EM stages, a typical number of stages in a commercially available CCDs, although it will be appreciated that a different number of stages could be used. As can be seen, the accumulated gain over all EM stages as a result of the present invention is significant.
Figure 19 shows a further arrangement in which the protrusions 1906 of the leading edge 1904 have a trapezoidal shape. Here, as with the previously described arrangements, the side edges 1907 and 1909 are separated such that the distance between them defines the maximum width of the HV electrode across the channel. The leading edge 1904 extends across the maximum width from the first side edge 1907 to the second side edge 1909.
It will be appreciated that the invention extends to any appropriate arrangement of shape of the electron multiplication element and is not limited to the examples outlined above.
For example, the EM electrode may have protrusions that protrude at different angles relative to the direction of charge transfer. An example of such an arrangement is shown in figure 20. This arrangement is a modification of the sawtooth arrangement described with respect to figure 6. As with the arrangement of figure 6, the leading edge is shaped such that the HV electrode has four protrusions, or teeth, that extend across the maximum width of the HV electrode. This arrangement differs from that shown in figure 6 in that the teeth have different orientations with respect to the charge transfer channel. The two teeth 2006A on one side of the HV electrode are angled toward the channel side to which they are nearest and the two teeth 2006B on the other side of the HV electrode are angled towards the channel side to which they are nearest.
Further, arrangements are possible wherein the HV electrode has a smooth leading edge in which the changes of direction are smooth, continuous or non-angular, such as a sine wave, a curve or other appropriate shape. Further, the leading edge may be part castellated and part serrated, or part smooth and part angular, for example part of the leading edge may be shaped as a sine wave and part may have a castellated shape.
Further, although the present embodiment is described in relation to a first side edge and a second side edge arranged parallel to each other on either side of the HV electrode, it will be appreciated that the first side edge and second side edge do not have to be parallel to each other.
For example, figure 21 shows an example arrangement, wherein the side edges are not parallel to one another. In figure 21, the first side edge 2107 and the second edge 2109 slant outwards from the back edge 2118 of the HV electrode such that they are angled towards the sides of the channel. This slant results in the width of the HV electrode across the channel progressively increasing along the channel in the direction opposite the direction of charge transfer. The slanted side edges 2107 and 2109 extend along the channel until they meet the leading edge 2104 at point 2120 along the channel. It is at this point 2120 along the channel that the distance between the first side edge and the second side edge defines the maximum width of the HV electrode across the channel. From point 2120 along the channel, the edge of the HV electrode slants away from the channel sides resulting in a decrease of the width of the HV electrode across the channel. Thus, from this point 2120 the edge of the HV electrode extends across the maximum width of HV electrode across the channel and therefore forms the leading edge of the HV electrode.
It will be appreciated that the side edges may not be symmetrical. For example, the first side edge could comprise a slanted portion and a parallel portion whilst the second side edge only comprises a parallel portion or only a slanted portion. Alternatively, both side edges could be curved, or one side edge could be curved and the other not, or both side edges may comprise curved portions and non-curved portions or any other arrangement suitable for defining a maximum width of the HV electrode from which the leading edge can extend across.
An example of this is shown in figure 22. Here, both the protrusions 2206 and the side edges 2207 and 2208 are asymmetrical. The second side edge 2209 protrudes along the channel further than the first side edge 2207. First side edge 2207 extends along the channel until it meets the leading edge 2204 at point 2220. The second side edge protrudes along the channel until it meets the leading edge 2204 at point 2221. The point 2221 is arranged further along the channel than point 2220 and the distance between these two points across the channel (i.e. the separation of the two side edges along the channel) defines the maximum width 2205 of the HV electrode. The leading edge 2204 then extends between point 2220 and point 2221, thus extending across the maximum width of the HV electrode across the channel.
Alternatively, the P2HV electrode may not have a first side edge or a second side edge at all. In such cases, the extent to which the leading edge extends along the channel may be equal to the extent to which the HV electrode extends along the channel.
An example of such an arrangement is shown in figure 23. Here, the edge of the HV electrode is shaped such that the maximum width 2305 of the HV electrode across the channel is defined by the back edge 2318 of the HV electrode. As such, the entire edge of the HV electrode forming the boundary between the HV electrode and the DC electrode is the leading edge 2304; the first slanted leading edge portions 2307 and second slanted leading edge portion 2309 of this arrangement form part of the leading edge. These slanting portions of the leading edge slant inwards from the back edge 2318 towards the centre of the channel. Therefore, they form part of the edge that extends across the maximum width of the channel and as such form part of the leading edge. Thus, this arrangement may be described as having only a leading edge and a back edge.
Although the forgoing arrangements have been described in relation to CCD, it will be appreciated that the invention, and therefore any of the preceding arrangements are applicable to image sensors that utilise CMOS technology. For example, the EM structure of the invention can be implemented in a CMOS image sensor.
In such an arrangement, the electron multiplication elements may not form part of an EM register comprising a plurality of EM elements. Instead, each photosensitive element of the CMOS image sensor’s pixel array may have an EM element arranged adjacent to or within the photosensitive element, as described above. Charge from a particular photosensitive element is therefore passed through this single EM element before being transferred to an output for signal processing. However, before this transfer, the charge is repeatedly passed between the electrodes of the EM element to provide adequate the multiple EM stages required for obtaining significant EM gain, as will be described in greater detail with reference to figure 24.
Figure 24 shows a further example of an EM element, which may be particularly suited to a CMOS image sensor. Here, the electron multiplication element 2400 is arranged adjacent to a photosensitive element, here photodiode 2422 or other appropriate element for converting incident photons into charge. The charge collected by the photodiode 2422 is transferred by transfer electrode C1 to the EM element 2400 along charge transport path 2402. This charge transport path may be a channel of the type used by the CCD image sensors, for example it could be buried channel or a surface channel. Alternatively, the charge transport path 2402 may not be a channel in the sense of that utilised by CCD image sensors. Instead, charge may be confined by using overlapping electrodes or a transistor chain.
Transfer electrode, which may be described as clocked electrode C1, is arranged adjacent to a first electrode P1 of the EM element 2400. Charge is therefore transferred from the clocked electrode to the first electrode P1. As this point in time, charge is being transferred away from the photodiode. In this direction of charge transfer, electrode P1 acts as a clocked electrode. In other words, the voltages applied to this electrode at this point in time are sufficient to clock charge along the channel but not induce EM. Charge is then transferred from electrode P1 to the DC electrode P2DC, arranged adjacent to the first electrode, and then from P2DC to a second electrode P3, which is arranged adjacent to the DC electrode. In this direction of charge transfer, the second electrode P3 acts as the high voltage electron multiplication electrode. A sufficiently high voltage is applied to P3 as charge is transferred across the boundary between P2DC and P3 that charge undergoes EM.
Once the charge has crossed the boundary between the P2DC electrode and the P3 electrode and has undergone EM, the direction of charge transfer is reversed. Charge is now transferred back towards the photodiode 2422. For this direction of charge transfer, the electrode P3 does not act as the HV electrode. Instead, the electrode P3 acts as a clocked electrode and first electrode P1 acts as the high voltage EM electrode. Charge is transferred from P3 to P2DC and then to P1. As charge is transferred across the boundary between P2DC and P1, the high voltage EM electrode P1 stimulates EM.
Charge can be passed between these electrodes many times to provide significant EM gain, with either first electrode P1 or the second electrode P3 acting as the HV electrode depending on the direction of charge transfer.
Both the first electrode P1 and the second electrode P3 have leading edges 2404 that define a boundary with the DC electrode. Both the leading edges extend across the maximum width of their respective electrodes across the charge transport path. In the present arrangement, this maximum width is equal to the width of the charge transport path 2403.
Here, the leading edges of the first and second electrodes P1 and P2 have changes in direction such that the length of each edge greater than the maximum width of their respective electrodes across the charge transport path. These changes in direction are such that both electrodes P1 and P2 have a saw-tooth shape.
The advantages to this arrangement of having the first and second electrodes P1 and P3 with leading edges having a saw-tooth shape is the same as those described for the previous arrangements. Further, although the present embodiment has been described as having saw-tooth shaped electrodes, it will be appreciated that the leading edges may be shaped in any way previously described with respect to the earlier arrangements. In other words the leading edges may have protrusions that are castellated, triangular, asymmetrical, curved or any appropriate combination of these as discussed above. Further, P1 and P3 may not have the same shaped protrusions. For example, P1 may have saw-tooth shaped protrusions and P3 may have castellated, or P1 may have asymmetrical curved protrusions while P3 has symmetrical angular protrusions.
It will be appreciated that the invention extends to other arrangements of EM elements that are appropriate for a CMOS image sensor. For example, the EM element may not utilise two electrodes to provide EM as was described with respect to figure 24. In such a case, the first electrode P1 may permanently act as a clocked electrode and the P3 electrode permanently acts as an HV electrode or vice versa. Here, charge may still be repeatedly passed between the three electrodes. However, EM only occurs when the charge is transferred across the boundary between the DC and the HV electrodes.

Claims (31)

1. An image sensor of the type for providing charge multiplication by impact ionisation, comprising an image area having a plurality of photosensitive elements and a plurality of multiplication elements arranged to receive charge from the photosensitive elements of the image area, each multiplication element comprising a sequence of electrodes arranged along a charge transport path including a charge multiplication electrode arranged to cause charge multiplication as charge is transferred along the charge transport path by the electrodes, wherein the charge multiplication electrode of each multiplication element has: a back edge defining a boundary with a first electrode; a maximum width across the charge transport path; and a leading edge defining a boundary with a second electrode for charge multiplication and arranged across the charge transport path and extending across the maximum width, wherein the leading edge has one or more changes of direction such that the length of the edge is greater than the maximum width of the charge multiplication electrode across the charge transport path.
2. An image sensor according to claim 1, wherein the charge multiplication electrode has one or more protruding portions that protrude along the charge transport path in comparison to one or more recessing portions.
3. An image sensor according to claim 1 or 2, wherein the charge multiplication electrode is non-rectangular.
4. An image sensor according to any preceding claims, wherein the electron multiplication electrode further comprises: a first side edge arranged along one side of the charge transport path and a second side edge arranged along the other side of the charge transport path, the maximum distance between the first and second side edges defining the maximum width of the charge multiplication electrode across the charge transport path.
5. An image sensor according to claim 4, wherein the first and second side edges are parallel one another along the charge transport path.
6. An image sensor according to claim 4 or 5, wherein the leading edge meets the side edges at a point of maximum width.
7. An image sensor according to claims 1 to 3, wherein the leading edge meets the back edge at a point of maximum width.
8. An image sensor according to any preceding claims wherein the first electrode is a first clocked electrode and the second electrode is a DC electrode.
9. An image sensor according to claim 8, wherein each multiplication element further comprises a third electrode arranged adjacent to the DC electrode.
10. An image sensor according to claim 8 or 9, wherein the electrodes are arranged such that charge is transferred along the charge transport path from the DC electrode to the charge multiplication electrode to the first clocked electrode such that the charge travels across the charge multiplication electrode.
11. An image sensor according to claim 9 or 10, wherein the third electrode is a clocked electrode and has a leading edge across the charge transport path having one or more changes of direction such that the length of the leading edge is greater than the maximum width of the second clocked electrode across the charge transport path.
12. An image sensor according to claim 11, wherein the leading edge of the charge multiplication electrode and the leading edge of the second clocked electrode each have one or more protruding portions that protrude along the charge transport path in comparison to one or more recessing portions.
13. An image sensor according to claim 12, wherein the one or more protruding portions protrude such that the distance between the leading edge of the charge multiplication electrode and the leading edge of the second clocked electrode is reduced relative to the non-protruding portions.
14. An image sensor according to claim 12 or 13, wherein the charge multiplication electrode and the second clocked electrode each have a central protruding portion, wherein the central portion of the charge multiplication electrode and the central portion of the second clocked electrode substantially align.
15. An image sensor according to claim 8 to 14, wherein the DC electrode has an edge shaped to correspond to the shape of the leading edge of the charge multiplication electrode such that the distance between the edge of the DC electrode and the leading edge of the charge multiplication electrode remains constant along the length of the leading edge of the charge multiplication electrode.
16. An image sensor according to any preceding claim, wherein the charge multiplication elements are arranged in a charge multiplication register arranged to receive charge from the image area.
17. An image sensor according to claim 16, wherein the charge multiplication register is arranged to receive charge from multiple photosensitive elements of the image area.
18. An image sensor according to any preceding claim, wherein the image sensor is a CCD image sensor.
19. An image sensor according to claim 9, wherein the third electrode has a leading edge defining a boundary with the DC electrode across the charge transport path and extending across the maximum width, wherein the leading edge of the third electrode for charge multiplication has one or more changes of direction such that the length of the edge is greater than the maximum width of the charge multiplication electrode across the charge transport path.
20. An image sensor according to claim 19, wherein the electrodes are arranged such that charge is multiplied as it is transferred from the DC electrode to the charge multiplication electrode and when it is transferred from the DC electrode to the third electrode.
21. An image sensor according to claims 1 to 9 or 19 to 20, wherein each charge multiplication element is arranged to receive charge from a respective photosensitive element.
22. An image sensor according to any preceding claim wherein the changes in direction of the leading edges are discontinuous.
23. An image sensor according to any preceding claim, wherein the electrodes having leading edges have a saw tooth shape.
24. An image sensor according to any preceding claim, wherein the electrodes having leading edges have a castellated shape.
25. An image sensor according to any preceding claim, wherein the leading edges having one or more changes in direction have a triangular shape.
26. An image sensor according to any preceding claim wherein each charge multiplication element is made by a CMOS process.
27. An image sensor according to any preceding claim, wherein the charge transport path is defined by a charge channel.
28. An apparatus comprising an image sensor according to any preceding claim.
29. An apparatus according to claim 28, being a scientific apparatus.
30. A camera comprising an image sensor according to any preceding claim.
31. An image sensor according to any preceding claim, wherein the electrodes are arranged to transfer charge along the charge transfer path by drive pulses applied to the electrodes.
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