GB2532617A - Making diodes - Google Patents

Making diodes Download PDF

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Publication number
GB2532617A
GB2532617A GB1521800.1A GB201521800A GB2532617A GB 2532617 A GB2532617 A GB 2532617A GB 201521800 A GB201521800 A GB 201521800A GB 2532617 A GB2532617 A GB 2532617A
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Prior art keywords
wafer
laser
diode
back side
annealing
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GB1521800.1A
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GB2532617B (en
GB201521800D0 (en
Inventor
Ke Maolong
Francis Deviny Ian
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Zhuzhou CRRC Times Electric Co Ltd
Dynex Semiconductor Ltd
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Zhuzhou CSR Times Electric Co Ltd
Dynex Semiconductor Ltd
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Publication of GB201521800D0 publication Critical patent/GB201521800D0/en
Publication of GB2532617A publication Critical patent/GB2532617A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3223Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering using cavities formed by hydrogen or noble gas ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • H01L29/66143Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Photovoltaic Devices (AREA)

Abstract

A method of making a diode from a wafer 2 of semiconductor material having a front side 4 on which an anode 8 of the diode is formed and a back side 6 on which a cathode of the diode is formed. The method includes the step: irradiating the wafer 2 with electrons thereby to create recombination centers evenly distributed through the wafer 2; and heating the wafer and at the same time laser annealing the wafer 2 from the back side 6 thereby to form a region in the wafer 2, adjacent the back side 6, with an increased lifetime. The method may include one or more of the steps; grinding the back surface of the wafer; forming a buffer layer; localized lifetime killing; annealing; and dopant implantation. The wafer may be heated using a heated chuck. The annealing may be performed using pulsed or continuous laser light at a wavelength between 300 nm to 1100 nm.

Description

MAKING DIODES
Field of the Invention
The invention relates to a method of making diodes and to diodes, particularly power diodes.
Background to the Invention
Diodes are made from wafers of semiconductor material using step-by-step processes. On one side of the wafer, generally referred to as the front side, an anode of the diode is formed, and on the other side, generally referred to as the back side, a cathode of the diode is formed.
When a diode transitions from a conducting state to a non-conducting state (turns off), it temporarily conducts in the reverse direction before the current falls to zero. This process is called reverse recovery. The time taken to recover is dependent upon the lifetime of charge carriers, that is, the time it takes for charge carriers to recombine. In power diodes, reverse recovery can be a significant because of the rate of change of current involved in transitions.
It is known to use lifetime control to improve the reverse recovery characteristics of power diodes. One way of doing this is with a combination of front (anode) side proton irradiation and electron irradiation. Irradiation introduces point defects into the semiconductor material that act as recombination centres.
A higher concentration of defects increases carrier recombination, which brings about a lower lifetime. Proton irradiation produces a non-uniform defect profile allowing local lifetime modification, that is, variations in lifetime with distance away from one of the sides of the wafer. Electron irradiation produces a uniform defect profile across the wafer. The combined proton and electron irradiation gives a defect profile that is approximately the sum of individual irradiations, meaning a change to the lifetime across the whole wafer with local variation where needed.
For power diodes which use high resistivity silicon, electron irradiation has to be limited to avoid sudden collapse of charge from the back (cathode) side combined with decreasing charge from the front side during turn-off, which is known as snappy behaviour. To reduce snappy behaviour, the defect profile of a diode is preferably such that lifetime is increased in the region adjacent the -2 -back side. Front to back side profiling can be achieved by spread energy proton implanting from the front side, but there is a practical limit on this due to the implant energy required. Also, proton irradiation can be expensive.
Summary of the Invention
According to a first aspect, there is provided a method of making a diode from a wafer of semiconductor material having a front side on which an anode of the diode will be formed and a back side on which a cathode of the diode will be formed, including the steps of: (1) irradiating the wafer with electrons thereby to create recombination centres evenly distributed through the wafer; and (2) heating the wafer and at the same time laser annealing the wafer from the back side thereby to form a region in the wafer, adjacent the back side, with a reduced number of recombination centres.
The laser annealing produces a temperature profile in the region of the wafer adjacent the back side. The temperature is a maximum at the back side and reduces generally exponentially, with distance into the wafer. The number of recombination centres created by the electron radiation that are left following laser annealing is inversely proportional to the temperature. Consequently, at the back side, no recombination centres may be left if a sufficient temperature is achieved, and the number may increase inversely proportionally to the tempera-ture up to the point where the temperature has no effect on the recombination centres. Thus, the lifetime in the region is proportional to the temperature and increased compared to the remainder of the wafer.
The temperature profile in the region adjacent the back side may be changed by changing the laser annealing conditions. The laser annealing may be carried out for between 1ns and is. The laser annealing may be carried out using laser light with an energy density of around 2J/cm2 or more. The laser annealing may be carried out using laser light of a wavelength in the range 300nm to 1100nm. The laser annealing may be carried out using continuous or pulsed laser light. The laser annealing may comprise laser annealing using laser light of a first wavelength, followed by laser annealing using laser light of one or more other, different wavelengths. Alternatively, the laser annealing may com- -3 -prise laser annealing using laser light of two or more different wavelengths simultaneously.
The wafer may be heated using a heated chuck.
The method may further comprise repeating the steps of the first aspect.
The method may further include one or more of the steps of: (a) grinding the back surface of the wafer; (b) forming a buffer layer; (c) localised lifetime killing; (d) annealing; and (e) dopant implantation According to a second aspect, there is provided a diode made by the first aspect.
Brief Description of the Drawings
Figure la is a schematic representation of a wafer of semiconductor ma-terial, viewed side on, to which an anode has been attached to the front side; Figure 1 b is a schematic representation of the wafer shown in figure 1 a following grinding at the back surface; Figure 1 c is a schematic representation of the ground wafer shown in figure 1 b, with the position of a buffer layer indicated; Figure ld is a schematic representation of the wafer shown in figure is undergoing electron irradiation; Figure 1e is a schematic representation of the wafer shown in figure ld, following electron irradiation and then laser annealing, with the region adjacent the back side of increased lifetime indicated; and Figure 2 is a graph of illustrating the temperature profile of a wafer un-dergoing laser annealing and heating.
Detailed Description of the Illustrated Embodiment
With reference to figure 1, which illustrates a selection of the steps in the process of making a power diode, a wafer 2 of high resistivity silicon has a front side 4 (figure 1 a). The wafer 2 is lightly n-typed doped according to the diode's power rating. An anode 8 is formed on the front side 4. Next (figure 1 b), the back surface of the wafer 2 is ground to reduce the wafer thickness to an ap- -4 -propriate level according to the voltage rating of the diode. For example, for a power diode with a 1700V rating, the wafer 2 may be ground to a thickness of 200pm. For power diodes with lesser ratings, such as 1200V or 650V, the wafer 2 may be ground thinner.
The ground wafer 2 has a back side 6. A buffer layer 10 (figure 1c) is formed in the wafer 2, inboard from the back side 6, using proton implantation or multiple proton implantations and by annealing the wafer up to 490°C to activate the implanted protons. Optionally, the wafer 2 may then undergo a localised lifetime killing process using either helium or proton implantation from the front side 4. This is followed by electron irradiation (figure 1d), which achieves uniform lifetime control by creating recombination centres evenly distributed through the wafer 2. A dose of 25kGy is typically used for a power diode with a 1700V rating. After that, an oven is used to anneal the wafer at around 300°C for partial healing and defect stabilisation.
For contact purposes, back side n-type implantation is carried out, typi-cally using phosphorous. Then, the wafer is laser annealed from the back side 6, which: (1) forms silicide for low contact resistance; (2) activates implanted phosphorous; and, (3) reduces the number of recombination centres created by electron irradiation in a region 12, adjacent the back side 6, (figure 1 e) so as to give that region 12 an increased lifetime compared to the rest of the wafer 2.
The energy density of the laser used to anneal is normally 2J/cm2 or higher. Also, different laser wavelengths may be used. Generally speaking, annealing with a longer wavelength laser produces a deeper (thicker) modification of lifetime as the laser penetrates further into the wafer 2, but this in turn requires higher energy density because of the greater thermal mass involved.
With reference to figure 2, a wafer, having gone through the pre-laser annealing steps set out above, is laser annealed from the back side at the same time as being heated to 200°C using a heated chuck (not shown). During laser annealing, the wafer has a maximum temperature at its back side (x = 0), and the temperature within the wafer decreases with distance (as indicated along the x axis) away from the back side, into the wafer. At the back side, the temperature reaches the wafer melting point of approximately 1420°C, which is suf- -5 -ficient to cause re-crystallisation and the recombination centres created by electron radiation completely disappear. As the temperature drops in the region adjacent the back side to around 500°C, the number of recombination centres left will increase because their number is inversely proportional to the temperature, and lifetime will correspondingly decrease in that region. Where the temperature drops below 500°C, its effect on the recombination centres will be minimum and the lifetime will remain at a depressed level due to the effect of the electron irradiation step. In other words, in the region adjacent the back side, the lifetime profile is proportional to the temperature profile. Hence, by changing the laser annealing conditions, the temperature profile can be changed to produce a life-time profile that creates improved reverse recovery performance for the diode made from the wafer. The laser wavelength, laser power, duration of laser pulses and additional heating provided can all be varied. Therefore, the lifetime profile in the region adjacent the back side can be varied accordingly. -6 -

Claims (9)

  1. CLAIMS1. A method of making a diode from a wafer of semiconductor mate- rial having a front side on which an anode of the diode is formed and a back side on which a cathode of the diode is formed, includ-ing the steps of: (1) irradiating the wafer with electrons thereby to create recombination centres evenly distributed through the wafer; and (2) heating the wafer and at the same time laser annealing the wafer from the back side thereby to form a region in the wa-if) fer, adjacent the back side, with an increased lifetime.
  2. 2. A method according to claim 1, wherein the laser annealing is car-ried out for between ins and 1s.
  3. 3. A method according to claim 1 or claim 2, wherein the laser an-nealing is carried out using laser light with an energy density of around 2J/cm2 or more.
  4. 4. A method according to any of claims 1 to 3, wherein the laser an-nealing is carried out using laser light of a wavelength in the range 300nm to 1100nm.
  5. 5. A method according to any of claims 1 to 4, wherein the laser an-nealing is carried out using continuous or pulsed laser light.
  6. 6. A method according to any preceding claim, wherein the wafer is heated using a heated chuck.
  7. 7. A method according to any preceding claim, further comprising repeating the steps of any of the preceding claims.
  8. 8. A method according to any preceding claim, further including one or more of the steps of: (a) grinding the back surface of the wafer; (b) forming a buffer layer; (c) localised lifetime killing; (d) annealing; and (e) dopant implantation.
  9. 9. A diode made by a method according to any preceding claim.Amendments to the Claims have been filed as follows:CLAIMS1. A method of making a diode from a wafer of semiconductor mate- rial having a front side on which an anode of the diode is formed and a back side on which a cathode of the diode is formed, includ-ing the steps of: (1) irradiating the wafer with electrons thereby to create recombination centres evenly distributed through the wafer; and (2) heating the wafer and at the same time laser annealing the wafer from the back side thereby to form a region in the wa-fer, adjacent the back side, with an increased lifetime.A method according to claim 1, wherein the laser annealing is carried out for between ins and 1s.A method according to claim 1 or claim 2, wherein the laser an-nealing is carried out using laser light with an energy density of around 2J/cm2 or more.A method according to any of claims 1 to 3, wherein the laser annealing is carried out using laser light of a wavelength in the range 300nm to 1100nm.A method according to any of claims 1 to 4, wherein the laser an-nealing is carried out using continuous or pulsed laser light.A method according to any preceding claim, wherein the wafer is heated using a heated chuck.A method according to any preceding claim, further comprising repeating the steps of any of the preceding claims.A method according to any preceding claim, further including one or more of the steps of: (a) grinding the back surface of the wafer; (b) forming a buffer layer; (c) localised lifetime killing; (d) annealing; and (e) dopant implantation. 2. 3. (r) 4. (r) 5. 6. 7. 8.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0432612A2 (en) * 1989-12-09 1991-06-19 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Process for profiling the charge carriers life-time in a semiconductor
JPH07226405A (en) * 1994-12-19 1995-08-22 Meidensha Corp Manufacture of semiconductor device
JP2012199577A (en) * 2012-06-04 2012-10-18 Fuji Electric Co Ltd Semiconductor device and method of manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0432612A2 (en) * 1989-12-09 1991-06-19 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Process for profiling the charge carriers life-time in a semiconductor
JPH07226405A (en) * 1994-12-19 1995-08-22 Meidensha Corp Manufacture of semiconductor device
JP2012199577A (en) * 2012-06-04 2012-10-18 Fuji Electric Co Ltd Semiconductor device and method of manufacturing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Proceedings of the 20th international Symposium on Power Semiconductor devices & ICs. 18-22 May 2008, Y. Onozawa et al. Development of the 1200V FZ-diode with soft recovery characteristics by the new local lifetime control technique, pages 80-83. *

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Publication number Publication date
GB2532617B (en) 2016-08-31
GB2528073B (en) 2016-08-31
GB2528073A (en) 2016-01-13
GB201521800D0 (en) 2016-01-27
GB201412145D0 (en) 2014-08-20

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