GB2525262B - Sharing processing results between different processing lanes of a data processing apparatus - Google Patents

Sharing processing results between different processing lanes of a data processing apparatus Download PDF

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Publication number
GB2525262B
GB2525262B GB1414436.4A GB201414436A GB2525262B GB 2525262 B GB2525262 B GB 2525262B GB 201414436 A GB201414436 A GB 201414436A GB 2525262 B GB2525262 B GB 2525262B
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GB
United Kingdom
Prior art keywords
processing
lanes
sharing
results
different
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1414436.4A
Other versions
GB2525262A (en
GB201414436D0 (en
Inventor
Sideris Isidoros
Croxford Daren
Burdass Andrew
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Publication of GB201414436D0 publication Critical patent/GB201414436D0/en
Priority to US14/663,858 priority Critical patent/US10514928B2/en
Publication of GB2525262A publication Critical patent/GB2525262A/en
Application granted granted Critical
Publication of GB2525262B publication Critical patent/GB2525262B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Advance Control (AREA)
GB1414436.4A 2014-04-17 2014-08-14 Sharing processing results between different processing lanes of a data processing apparatus Active GB2525262B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/663,858 US10514928B2 (en) 2014-04-17 2015-03-20 Preventing duplicate execution by sharing a result between different processing lanes assigned micro-operations that generate the same result

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GR20140100223 2014-04-17

Publications (3)

Publication Number Publication Date
GB201414436D0 GB201414436D0 (en) 2014-10-01
GB2525262A GB2525262A (en) 2015-10-21
GB2525262B true GB2525262B (en) 2021-06-02

Family

ID=51662424

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1414436.4A Active GB2525262B (en) 2014-04-17 2014-08-14 Sharing processing results between different processing lanes of a data processing apparatus

Country Status (1)

Country Link
GB (1) GB2525262B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260898A (en) * 1992-03-13 1993-11-09 Sun Microsystems, Inc. Result cache for complex arithmetic units
US5845103A (en) * 1997-06-13 1998-12-01 Wisconsin Alumni Research Foundation Computer with dynamic instruction reuse
US20100180102A1 (en) * 2009-01-15 2010-07-15 Altair Semiconductors Enhancing processing efficiency in large instruction width processors
US20110047349A1 (en) * 2009-08-18 2011-02-24 Kabushiki Kaisha Toshiba Processor and processor control method
EP2115629B1 (en) * 2006-12-22 2014-06-18 Telefonaktiebolaget LM Ericsson (publ) Parallel processor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260898A (en) * 1992-03-13 1993-11-09 Sun Microsystems, Inc. Result cache for complex arithmetic units
US5845103A (en) * 1997-06-13 1998-12-01 Wisconsin Alumni Research Foundation Computer with dynamic instruction reuse
EP2115629B1 (en) * 2006-12-22 2014-06-18 Telefonaktiebolaget LM Ericsson (publ) Parallel processor
US20100180102A1 (en) * 2009-01-15 2010-07-15 Altair Semiconductors Enhancing processing efficiency in large instruction width processors
US20110047349A1 (en) * 2009-08-18 2011-02-24 Kabushiki Kaisha Toshiba Processor and processor control method

Also Published As

Publication number Publication date
GB2525262A (en) 2015-10-21
GB201414436D0 (en) 2014-10-01

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