GB201417926D0 - Signal processing apparatus - Google Patents

Signal processing apparatus

Info

Publication number
GB201417926D0
GB201417926D0 GBGB1417926.1A GB201417926A GB201417926D0 GB 201417926 D0 GB201417926 D0 GB 201417926D0 GB 201417926 A GB201417926 A GB 201417926A GB 201417926 D0 GB201417926 D0 GB 201417926D0
Authority
GB
United Kingdom
Prior art keywords
processing apparatus
signal processing
signal
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB1417926.1A
Other versions
GB2531058A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
APTCORE Ltd
Original Assignee
APTCORE Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by APTCORE Ltd filed Critical APTCORE Ltd
Priority to GB1417926.1A priority Critical patent/GB2531058A/en
Publication of GB201417926D0 publication Critical patent/GB201417926D0/en
Publication of GB2531058A publication Critical patent/GB2531058A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
GB1417926.1A 2014-10-10 2014-10-10 Signal processing apparatus Withdrawn GB2531058A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1417926.1A GB2531058A (en) 2014-10-10 2014-10-10 Signal processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1417926.1A GB2531058A (en) 2014-10-10 2014-10-10 Signal processing apparatus

Publications (2)

Publication Number Publication Date
GB201417926D0 true GB201417926D0 (en) 2014-11-26
GB2531058A GB2531058A (en) 2016-04-13

Family

ID=52001198

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1417926.1A Withdrawn GB2531058A (en) 2014-10-10 2014-10-10 Signal processing apparatus

Country Status (1)

Country Link
GB (1) GB2531058A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117093272A (en) * 2023-10-07 2023-11-21 飞腾信息技术有限公司 Instruction sending method and processor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6029242A (en) * 1995-08-16 2000-02-22 Sharp Electronics Corporation Data processing system using a shared register bank and a plurality of processors
US20050204118A1 (en) * 2004-02-27 2005-09-15 National Chiao Tung University Method for inter-cluster communication that employs register permutation
TW200832220A (en) * 2007-01-16 2008-08-01 Ind Tech Res Inst Digital signal processor
US8539462B2 (en) * 2010-12-21 2013-09-17 National Tsing Hua University Method for allocating registers for a processor based on cycle information

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117093272A (en) * 2023-10-07 2023-11-21 飞腾信息技术有限公司 Instruction sending method and processor
CN117093272B (en) * 2023-10-07 2024-01-16 飞腾信息技术有限公司 Instruction sending method and processor

Also Published As

Publication number Publication date
GB2531058A (en) 2016-04-13

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)