GB2462959B - Semiconductor device and control method thereof - Google Patents
Semiconductor device and control method thereofInfo
- Publication number
- GB2462959B GB2462959B GB0920990A GB0920990A GB2462959B GB 2462959 B GB2462959 B GB 2462959B GB 0920990 A GB0920990 A GB 0920990A GB 0920990 A GB0920990 A GB 0920990A GB 2462959 B GB2462959 B GB 2462959B
- Authority
- GB
- United Kingdom
- Prior art keywords
- semiconductor device
- control method
- semiconductor
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Read Only Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0920990A GB2462959B (en) | 2004-11-30 | 2004-11-30 | Semiconductor device and control method thereof |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0710009A GB2434675B (en) | 2004-11-30 | 2004-11-30 | Semiconductor device and semiconductor control method |
GB0920990A GB2462959B (en) | 2004-11-30 | 2004-11-30 | Semiconductor device and control method thereof |
Publications (3)
Publication Number | Publication Date |
---|---|
GB0920990D0 GB0920990D0 (en) | 2010-01-13 |
GB2462959A GB2462959A (en) | 2010-03-03 |
GB2462959B true GB2462959B (en) | 2010-04-28 |
Family
ID=41572939
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0920990A Expired - Fee Related GB2462959B (en) | 2004-11-30 | 2004-11-30 | Semiconductor device and control method thereof |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2462959B (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0696593A (en) * | 1992-09-14 | 1994-04-08 | Toshiba Corp | Semiconductor memory |
JP2003199329A (en) * | 2001-12-28 | 2003-07-11 | Iwate Toshiba Electronics Co Ltd | Semiconductor integrated circuit |
US20040008567A1 (en) * | 2002-07-12 | 2004-01-15 | Fujitsu Limited | Threshold voltage adjustment method of non-volatile semiconductor memory device and non-volatile semiconductor memory device |
US20040012997A1 (en) * | 2002-07-18 | 2004-01-22 | Mitsubishi Denki Kabushiki Kaisha | Nonvolatile semiconductor memory |
JP2004334994A (en) * | 2003-05-09 | 2004-11-25 | Renesas Technology Corp | Semiconductor integrated circuit device |
-
2004
- 2004-11-30 GB GB0920990A patent/GB2462959B/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0696593A (en) * | 1992-09-14 | 1994-04-08 | Toshiba Corp | Semiconductor memory |
JP2003199329A (en) * | 2001-12-28 | 2003-07-11 | Iwate Toshiba Electronics Co Ltd | Semiconductor integrated circuit |
US20040008567A1 (en) * | 2002-07-12 | 2004-01-15 | Fujitsu Limited | Threshold voltage adjustment method of non-volatile semiconductor memory device and non-volatile semiconductor memory device |
US20040012997A1 (en) * | 2002-07-18 | 2004-01-22 | Mitsubishi Denki Kabushiki Kaisha | Nonvolatile semiconductor memory |
JP2004334994A (en) * | 2003-05-09 | 2004-11-25 | Renesas Technology Corp | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
GB2462959A (en) | 2010-03-03 |
GB0920990D0 (en) | 2010-01-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20231130 |